From: David Miller <davem@davemloft.net>
To: auke-jan.h.kok@intel.com
Cc: linville@tuxdriver.com, netdev@vger.kernel.org
Subject: Re: [PATCH] tg3: add amd8131 to "write reorder" chipsets
Date: Fri, 07 Jul 2006 13:57:24 -0700 (PDT) [thread overview]
Message-ID: <20060707.135724.26300161.davem@davemloft.net> (raw)
In-Reply-To: <44AEC252.70209@intel.com>
From: Auke Kok <auke-jan.h.kok@intel.com>
Date: Fri, 07 Jul 2006 13:21:38 -0700
> Moreover, since e1000 suffers from reordering/write-combining
> problems on the 8132, I'm starting to see an (ugly) pattern here. I
> didn't know that tg3 has a whole blacklist for this, could this
> affect other network cards as well?
The tg3 is probably more susceptible to this problem because of
how it uses a software structure in memory for interrupt status and
RX/TX descriptor table head/tail indexes.
Whereas the e1000 always has to synchronize with MMIO register reads
to get interrupt status and the indexes.
next prev parent reply other threads:[~2006-07-07 20:56 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-07-07 18:58 [PATCH] tg3: add amd8131 to "write reorder" chipsets John W. Linville
2006-07-07 19:12 ` David Miller
2006-07-07 19:21 ` John W. Linville
2006-07-07 20:21 ` Auke Kok
2006-07-07 20:57 ` David Miller [this message]
2006-07-08 20:29 ` David Miller
-- strict thread matches above, loose matches on Subject: below --
2006-07-07 19:51 Michael Chan
2006-07-07 20:16 ` John W. Linville
2006-07-07 21:22 Michael Chan
2006-07-07 23:57 ` David Miller
2006-07-08 0:49 Michael Chan
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