2.6.20-rc7: known regressions (v2) (part 1)

2.6.20-rc7: known regressions (v2) (part 1)

[Adrian Bunk]

This email lists some known regressions in 2.6.20-rc7 compared to 2.6.19
that are not yet fixed in Linus' tree.

If you find your name in the Cc header, you are either submitter of one
of the bugs, maintainer of an affectected subsystem or driver, a patch
of you caused a breakage or I'm considering you in any other way possibly
involved with one or more of these issues.

Due to the huge amount of recipients, please trim the Cc when answering.


Subject    : NULL pointer dereference at as_move_to_dispatch()
References : http://lkml.org/lkml/2007/1/22/141
Submitter  : Andrew Vasquez <andrew.vasquez@qlogic.com>
Status     : unknown


Subject    : pktcdvd doesn't work with libata pata drivers
             (caused by scsi_lib and pktcdvd patches)
References : http://bugzilla.kernel.org/show_bug.cgi?id=7810
             http://lkml.org/lkml/2007/1/25/128
             http://bugzilla.kernel.org/show_bug.cgi?id=7910
             http://lkml.org/lkml/2007/1/30/289
Submitter  : Gerhard Dirschl <gd@spherenet.de>
             Luca Tettamanti <kronos.it@gmail.com>
Caused-By  : Christoph Hellwig <hch@lst.de>
             commit 3b00315799d78f76531b71435fbc2643cd71ae4c
             commit 406c9b605cbc45151c03ac9a3f95e9acf050808c
Status     : unknown


Subject    : e1000: 82571EB/82572EI PCI-E cards: link is always down
             (MSI related)
References : http://lkml.org/lkml/2007/1/16/27
             http://lkml.org/lkml/2007/1/17/182
Submitter  : Allen Parker <parker@isohunt.com>
             Adam Kropelin <akropel1@rochester.rr.com>
Handled-By : Auke Kok <auke-jan.h.kok@intel.com>
Status     : problem is being debugged


Subject    : powerpc64: performance monitor exception
References : http://ozlabs.org/pipermail/linuxppc-dev/2007-January/030045.html
Submitter  : Livio Soares <livio@eecg.toronto.edu>
Caused-By  : Paul Mackerras <paulus@samba.org>
             commit d04c56f73c30a5e593202ecfcf25ed43d42363a2
Status     : unknown

Re: 2.6.20-rc7: known regressions (v2) (part 1)

[Auke Kok]

Adrian Bunk wrote:
> This email lists some known regressions in 2.6.20-rc7 compared to 2.6.19
> that are not yet fixed in Linus' tree.
> 
> If you find your name in the Cc header, you are either submitter of one
> of the bugs, maintainer of an affectected subsystem or driver, a patch
> of you caused a breakage or I'm considering you in any other way possibly
> involved with one or more of these issues.


> Subject    : e1000: 82571EB/82572EI PCI-E cards: link is always down
>              (MSI related)
> References : http://lkml.org/lkml/2007/1/16/27
>              http://lkml.org/lkml/2007/1/17/182
> Submitter  : Allen Parker <parker@isohunt.com>
>              Adam Kropelin <akropel1@rochester.rr.com>
> Handled-By : Auke Kok <auke-jan.h.kok@intel.com>
> Status     : problem is being debugged

I probably can't fix this bug. Not only do I doubt that the e1000 driver is at 
fault here, I don't have a system with this particular chipset. Most likely the 
regression comes from a combination of MSI layer rewrites and possibly platform 
issues. We've seen many reports that are similar and all are on the platform 
type mentioned here. I really don't want to point fingers here either.

None of the MSI code in e1000 has changed significantly either. as far as I can 
see, the msi code in e1000 has not changed since 2.6.18. Nonetheless there's no 
way I can debug any of this without a system.

I will address the fact that we are lacking any of these systems to test on, but 
that is not going to get this issue handled (not to mention soon) in the way it 
needs to be.

I strongly encourage the people on the linux-pci list to help out, I'll trace 
the e1000 driver for suspicious activity (again), but I run countless tests on 
the latest trees and nothing has shown up recently, other than Eric Biederman's 
msi irq reclaim leak fix.

Perhaps Adam can git-bisect this issue? Adam?

Cheers,

Auke

Re: 2.6.20-rc7: known regressions (v2) (part 1)

[Eric W. Biederman]

Auke Kok <auke-jan.h.kok@intel.com> writes:

> Adrian Bunk wrote:
>> This email lists some known regressions in 2.6.20-rc7 compared to 2.6.19
>> that are not yet fixed in Linus' tree.
>>
>> If you find your name in the Cc header, you are either submitter of one
>> of the bugs, maintainer of an affectected subsystem or driver, a patch
>> of you caused a breakage or I'm considering you in any other way possibly
>> involved with one or more of these issues.
>
>
>> Subject    : e1000: 82571EB/82572EI PCI-E cards: link is always down
>>              (MSI related)
>> References : http://lkml.org/lkml/2007/1/16/27
>>              http://lkml.org/lkml/2007/1/17/182
>> Submitter  : Allen Parker <parker@isohunt.com>
>>              Adam Kropelin <akropel1@rochester.rr.com>
>> Handled-By : Auke Kok <auke-jan.h.kok@intel.com>
>> Status     : problem is being debugged
>
> I probably can't fix this bug. Not only do I doubt that the e1000 driver is at
> fault here, I don't have a system with this particular chipset. Most likely the
> regression comes from a combination of MSI layer rewrites and possibly platform
> issues. We've seen many reports that are similar and all are on the platform
> type mentioned here. I really don't want to point fingers here either.
>
> None of the MSI code in e1000 has changed significantly either. as far as I can
> see, the msi code in e1000 has not changed since 2.6.18. Nonetheless there's no
> way I can debug any of this without a system.
>
> I will address the fact that we are lacking any of these systems to test on, but
> that is not going to get this issue handled (not to mention soon) in the way it
> needs to be.
>
> I strongly encourage the people on the linux-pci list to help out, I'll trace
> the e1000 driver for suspicious activity (again), but I run countless tests on
> the latest trees and nothing has shown up recently, other than Eric Biederman's
> msi irq reclaim leak fix.
>
> Perhaps Adam can git-bisect this issue? Adam?

Do we have any explanation about the weird /proc/interrupts output?
i.e. Multiple MSI irqs being assigned to the same card?

Does /sbin/ifconfig ethN down ; /sbin/ifconfig ethN up have anything to do
with the duplication in /proc/interrupts?

I can't see any way for a pci device that doesn't support msi-x to be assigned
multiple interrupts simultaneously.

I just skimmed through the code and there hasn't been any significant
generic MSI work since 2.6.19.

Did this device really work with MSI enabled in 2.6.19?

Eric

Re: 2.6.20-rc7: known regressions (v2) (part 1)

[Adam Kropelin]

Eric W. Biederman wrote:
> Auke Kok <auke-jan.h.kok@intel.com> writes:
>> None of the MSI code in e1000 has changed significantly either. as
>> far as I can see, the msi code in e1000 has not changed since
>> 2.6.18. Nonetheless there's no way I can debug any of this without a
>> system.
>> [...]
>> Perhaps Adam can git-bisect this issue? Adam?
>
> Do we have any explanation about the weird /proc/interrupts output?
> i.e. Multiple MSI irqs being assigned to the same card?
>
> Does /sbin/ifconfig ethN down ; /sbin/ifconfig ethN up have anything
> to do with the duplication in /proc/interrupts?
>
> I can't see any way for a pci device that doesn't support msi-x to be
> assigned multiple interrupts simultaneously.
>
> I just skimmed through the code and there hasn't been any significant
> generic MSI work since 2.6.19.
>
> Did this device really work with MSI enabled in 2.6.19?

I've never had this device work 100% with MSI on any kernel version I've 
tested so far. But I'm not the original reporter of the problem, and I 
believe for him it was a true regression where a previous kernel wored 
correctly.

The behavior I observe on 2.6.19 is better than 2.6.20-rc7. Link status 
interrupts seem to work but rx/tx does not. A few more details here:
<http://www.kroptech.com/~adk0212/mailimport/showmsg.php?msg_id=3339092450&db_name=linux_kernel>

I'm going to test 2.6.16 thru 2.6.20-rc7 this weekend and will report 
back any variations in behavior I notice.

--Adam

Re: 2.6.20-rc7: known regressions (v2) (part 1)

[Auke Kok]

Adam Kropelin wrote:
 > Eric W. Biederman wrote:
 >> Auke Kok <auke-jan.h.kok@intel.com> writes:
 >>> None of the MSI code in e1000 has changed significantly either. as
 >>> far as I can see, the msi code in e1000 has not changed since
 >>> 2.6.18. Nonetheless there's no way I can debug any of this without a
 >>> system.
 >>> [...]
 >>> Perhaps Adam can git-bisect this issue? Adam?
 >> Do we have any explanation about the weird /proc/interrupts output?
 >> i.e. Multiple MSI irqs being assigned to the same card?
 >>
 >> Does /sbin/ifconfig ethN down ; /sbin/ifconfig ethN up have anything
 >> to do with the duplication in /proc/interrupts?
 >>
 >> I can't see any way for a pci device that doesn't support msi-x to be
 >> assigned multiple interrupts simultaneously.
 >>
 >> I just skimmed through the code and there hasn't been any significant
 >> generic MSI work since 2.6.19.
 >>
 >> Did this device really work with MSI enabled in 2.6.19?
 >
 > I've never had this device work 100% with MSI on any kernel version I've
 > tested so far. But I'm not the original reporter of the problem, and I
 > believe for him it was a true regression where a previous kernel wored
 > correctly.

maybe I've been unclear, but here's how e1000 detects link changes:

1) by checking every 2 seconds in the watchdog by reading PHY registers
2) by receiving an interrupt from the NIC with the LSI bit in the interrupt 
control register

if the link is down to start with, the watchdog will obviously spot a 'link up' 
change since it doesn't use any interrupts.

The link interrupt (LSI) is a generic interrupt that comes over the same vector 
(be it MSI or not) as RX interrupts, and in your case doesn't arrive at all, 
which should be demonstrateable if you set e.g. the watchdog interval to 30 
seconds and unplug the cable - the driver won't spot the link change until the 
watchdog fires a lot later than you unplugged the cable.

 > The behavior I observe on 2.6.19 is better than 2.6.20-rc7. Link status
 > interrupts seem to work but rx/tx does not. A few more details here:
 > 
<http://www.kroptech.com/~adk0212/mailimport/showmsg.php?msg_id=3339092450&db_name=linux_kernel>

 > I'm going to test 2.6.16 thru 2.6.20-rc7 this weekend and will report
 > back any variations in behavior I notice.

that would be a good start, but I still think that you might have a broken 
bridge on that system. Anyway, thanks for digging into this.

Auke

Re: 2.6.20-rc7: known regressions (v2) (part 1)

[Adam Kropelin]

Auke Kok wrote:
> Adam Kropelin wrote:
>> I've never had this device work 100% with MSI on any kernel version
>> I've tested so far. But I'm not the original reporter of the
>> problem, and I believe for him it was a true regression where a
>> previous kernel wored correctly.
>
> maybe I've been unclear, but here's how e1000 detects link changes:
>
> 1) by checking every 2 seconds in the watchdog by reading PHY
> registers

That would explain why I see link status changes but 0 interrupt count 
in /proc/interrupts. However, on >= 2.6.19 the link state never changes. 
Ever. It's always down. On <= 2.6.18 the link state does change but with 
0 interupt count.

> 2) by receiving an interrupt from the NIC with the LSI bit
> in the interrupt control register
>
> if the link is down to start with, the watchdog will obviously spot a
> 'link up' change since it doesn't use any interrupts.

This does not seem to work on 2.6.19+. Unless the watchdog interval is 
tens of minutes. I've waited at least 5 minutes and link never went up.

>> The behavior I observe on 2.6.19 is better than 2.6.20-rc7. Link
>> status interrupts seem to work but rx/tx does not. A few more
>> details here:
> <http://www.kroptech.com/~adk0212/mailimport/showmsg.php?msg_id=3339092450&db_name=linux_kernel>
>
>> I'm going to test 2.6.16 thru 2.6.20-rc7 this weekend and will report
>> back any variations in behavior I notice.
>
> that would be a good start, but I still think that you might have a
> broken bridge on that system. Anyway, thanks for digging into this.

Will continue to dig.

--Adam

Re: 2.6.20-rc7: known regressions (v2) (part 1)

[Eric W. Biederman]

Auke Kok <auke-jan.h.kok@intel.com> writes:

> maybe I've been unclear, but here's how e1000 detects link changes:
>
> 1) by checking every 2 seconds in the watchdog by reading PHY registers
> 2) by receiving an interrupt from the NIC with the LSI bit in the interrupt
> control register
>
> if the link is down to start with, the watchdog will obviously spot a 'link up'
> change since it doesn't use any interrupts.
>
> The link interrupt (LSI) is a generic interrupt that comes over the same vector
> (be it MSI or not) as RX interrupts, and in your case doesn't arrive at all,
> which should be demonstrateable if you set e.g. the watchdog interval to 30
> seconds and unplug the cable - the driver won't spot the link change until the
> watchdog fires a lot later than you unplugged the cable.
>
>> The behavior I observe on 2.6.19 is better than 2.6.20-rc7. Link status
>> interrupts seem to work but rx/tx does not. A few more details here:
>>
> <http://www.kroptech.com/~adk0212/mailimport/showmsg.php?msg_id=3339092450&db_name=linux_kernel>
>
>> I'm going to test 2.6.16 thru 2.6.20-rc7 this weekend and will report
>> back any variations in behavior I notice.
>
> that would be a good start, but I still think that you might have a broken
> bridge on that system. Anyway, thanks for digging into this.

Right.  The basic question is on a problem system are MSI interrupts
from the card in /proc/interrupts observed.  If interrupts are not
observed (as it sounds like is the case) it is most likely something
outside of the card, and driver.  If interrupts are observed but the
card does not work correctly it could be a card or driver bug.

Ok.  In the archives I finally found the output of cat
/proc/interrupts and there were none.

This is a PCI-E to Hypertransport system from the lspci output.

Can I get the corresponding lspci -xxx output.  I suspect the BIOS
did not program the hypertransport MSI mapping capabilities correctly.
All it has to do is set the enable but still, occasionally BIOS
writers miss the most amazing things.

If that is the case with just a little creativity we should be able to
write a pci quirk that will enable the MSI mapping capability on this
class of systems and save ourselves a lot of trouble.

Although I thought I did see a quirk that disabled MSI if the enable
bit was not set.  Hmm.

Anyway please the lspci -xxx output.  Although if someone could teach
lspci to decode the hypertransport MSI mapping capability so that
lspic -vvv gave us this information that would be great too.

Eric

Re: 2.6.20-rc7: known regressions (v2) (part 1)

[Auke Kok]

Adam Kropelin wrote:
> Auke Kok wrote:
>> Adam Kropelin wrote:
>>> I've never had this device work 100% with MSI on any kernel version
>>> I've tested so far. But I'm not the original reporter of the
>>> problem, and I believe for him it was a true regression where a
>>> previous kernel wored correctly.
>> maybe I've been unclear, but here's how e1000 detects link changes:
>>
>> 1) by checking every 2 seconds in the watchdog by reading PHY
>> registers
> 
> That would explain why I see link status changes but 0 interrupt count 
> in /proc/interrupts. However, on >= 2.6.19 the link state never changes. 
> Ever. It's always down. On <= 2.6.18 the link state does change but with 
> 0 interupt count.
> 
>> 2) by receiving an interrupt from the NIC with the LSI bit
>> in the interrupt control register
>>
>> if the link is down to start with, the watchdog will obviously spot a
>> 'link up' change since it doesn't use any interrupts.
> 
> This does not seem to work on 2.6.19+. Unless the watchdog interval is 
> tens of minutes. I've waited at least 5 minutes and link never went up.

that's explained by a driver change that did that. Since at initialization we're 
basically waiting for a link change to tell the stack that we're up, we decided 
to change the order to have the hardware fire an LSI interrupt to trigger a 
watchdog run. So no interrupts would immediately explain why the watchdog never 
runs. That's nothing to worry about for this problem, as soon as interrupts are 
seen in /proc/interrupts this all starts working for e1000.

Cheers,

Auke

Re: 2.6.20-rc7: known regressions (v2) (part 1)

[Eric W. Biederman]

Auke Kok <auke-jan.h.kok@intel.com> writes:

> that's explained by a driver change that did that. Since at initialization we're
> basically waiting for a link change to tell the stack that we're up, we decided
> to change the order to have the hardware fire an LSI interrupt to trigger a
> watchdog run. So no interrupts would immediately explain why the watchdog never
> runs. That's nothing to worry about for this problem, as soon as interrupts are
> seen in /proc/interrupts this all starts working for e1000.


While I think we need to fix this issue, and in general the issue of MSI
interrupts on PCI-Express busses downstream of hypertransport chains.
This e1000 issue is not a regression, so not fixing it for 2.6.20 is
not a big deal.

I have yet to see all of the pieces I'm trying to look at confirmed,
but I believe by at least looking at the hypertransport MSI mapping
capability's enable bit in general we should be able to do a much
better job of detecting if MSI works in a system or not.

I though someone several months ago had made our MSI supported detect logic
a lot smarter, with defaults that were generally correct, but looking
at the kernel that code apparently never made it anywhere.  Instead
all I see are a handful of common chipsets special cased by the quirk logic.

We should be able to do a lot better but not in the 2.6.20 time frame.

As for the original problem report with duplicate MSI interrupts in
/proc/interrupts.  That sounds like a regression and is probably
simple to fix if we can get some more details.

Eric

Re: 2.6.20-rc7: known regressions (v2) (part 1)

[Adam Kropelin]

[-- Attachment #1: Type: text/plain, Size: 1401 bytes --]

Eric W. Biederman wrote:
> Auke Kok <auke-jan.h.kok@intel.com> writes:
>
>> maybe I've been unclear, but here's how e1000 detects link changes:
>>
>> 1) by checking every 2 seconds in the watchdog by reading PHY
>> registers 2) by receiving an interrupt from the NIC with the LSI bit
>> in the interrupt control register
>>
>> if the link is down to start with, the watchdog will obviously spot
>> a 'link up' change since it doesn't use any interrupts.
>>
>> The link interrupt (LSI) is a generic interrupt that comes over the
>> same vector (be it MSI or not) as RX interrupts, and in your case
>> doesn't arrive at all, which should be demonstrateable if you set
>> e.g. the watchdog interval to 30 seconds and unplug the cable - the
>> driver won't spot the link change until the watchdog fires a lot
>> later than you unplugged the cable.
>>
>>> The behavior I observe on 2.6.19 is better than 2.6.20-rc7. Link
>>> status interrupts seem to work but rx/tx does not. A few more
>>> details here:
>>>
>> <http://www.kroptech.com/~adk0212/mailimport/showmsg.php?msg_id=3339092450&db_name=linux_kernel>
>
> Can I get the corresponding lspci -xxx output.  I suspect the BIOS
> did not program the hypertransport MSI mapping capabilities correctly.
> All it has to do is set the enable but still, occasionally BIOS
> writers miss the most amazing things.

Here you go. This is from 2.6.20-rc7.

--Adam

[-- Attachment #2: lspci-2.6.20-rc7 --]
[-- Type: application/octet-stream, Size: 25954 bytes --]

00:00.0 RAM memory: nVidia Corporation C51 Host Bridge (rev a2)
00: de 10 f0 02 06 00 b0 00 a2 00 00 05 00 00 80 00
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e0: 08 00 00 a8 00 00 e0 fe 00 00 00 00 00 00 00 10
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:00.1 RAM memory: nVidia Corporation C51 Memory Controller 0 (rev a2)
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00:00.2 RAM memory: nVidia Corporation C51 Memory Controller 1 (rev a2)
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f0: 60 ea 10 10 18 00 00 20 00 00 00 00 00 00 00 00

00:00.4 RAM memory: nVidia Corporation C51 Memory Controller 4 (rev a2)
00: de 10 f9 02 06 00 a0 00 a2 00 00 05 00 00 00 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 f9 02
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00:00.5 RAM memory: nVidia Corporation C51 Host Bridge (rev a2)
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40: 17 00 00 00 00 fe fe 00 00 fe fe 00 00 fe fe 00
50: 00 fe fe 00 00 fe fe 00 00 fe fe 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:00.6 RAM memory: nVidia Corporation C51 Memory Controller 3 (rev a2)
00: de 10 7f 02 00 01 20 00 a2 00 00 05 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 7f 02
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
40: 08 00 00 00 00 00 00 00 00 80 cb fe 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:00.7 RAM memory: nVidia Corporation C51 Memory Controller 2 (rev a2)
00: de 10 7e 02 00 00 20 00 a2 00 00 05 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 7e 02
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
40: de 10 7e 02 11 00 00 00 74 05 00 00 11 00 00 00
50: 74 05 00 00 40 00 60 00 60 60 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 04 00 00 00 04
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 04 00 00 00 04
b0: ff ff 03 00 10 11 00 00 ac 10 20 00 30 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:02.0 PCI bridge: nVidia Corporation C51 PCI Express Bridge (rev a1)
00: de 10 fc 02 07 04 10 00 a1 00 04 06 10 00 01 00
10: 00 00 00 00 00 00 00 00 00 01 01 00 a1 a1 00 00
20: 80 fd 80 fd 71 fd 71 fd 00 00 00 00 00 00 00 00
30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 00 04 00
40: 0d 48 00 00 de 10 00 00 01 50 02 f8 00 00 00 00
50: 05 60 83 00 00 00 e0 fe 00 00 00 00 39 40 00 00
60: 08 80 00 a8 00 00 e0 fe 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 10 00 41 01 c0 04 00 00 1f 28 00 00 11 3c 11 02
90: 40 00 11 30 00 00 00 00 c0 01 48 01 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:03.0 PCI bridge: nVidia Corporation C51 PCI Express Bridge (rev a1)
00: de 10 fd 02 07 04 10 00 a1 00 04 06 10 00 01 00
10: 00 00 00 00 00 00 00 00 00 02 02 00 81 81 00 00
20: e0 fd e0 fd d1 fd d1 fd 00 00 00 00 00 00 00 00
30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 00 04 00
40: 0d 48 00 00 de 10 00 00 01 50 02 f8 00 00 00 00
50: 05 60 83 00 00 00 e0 fe 00 00 00 00 41 40 00 00
60: 08 80 00 a8 00 00 e0 fe 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 10 00 41 01 c0 04 00 00 1f 28 00 00 11 3c 11 01
90: 00 00 11 10 00 00 00 00 c0 01 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:04.0 PCI bridge: nVidia Corporation C51 PCI Express Bridge (rev a1)
00: de 10 fb 02 07 04 10 00 a1 00 04 06 10 00 01 00
10: 00 00 00 00 00 00 00 00 00 03 03 00 b1 b1 00 00
20: c0 fd c0 fd 91 fd 91 fd 00 00 00 00 00 00 00 00
30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 00 04 00
40: 0d 48 00 00 de 10 00 00 01 50 02 f8 00 00 00 00
50: 05 60 83 00 00 00 e0 fe 00 00 00 00 49 40 00 00
60: 08 80 00 a8 00 00 e0 fe 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 10 00 41 01 c0 04 00 00 1f 28 00 00 01 3d 11 00
90: 00 00 01 11 00 00 00 00 c0 01 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:05.0 VGA compatible controller: nVidia Corporation C51 PCI Express Bridge (rev a2)
00: de 10 41 02 07 00 b0 00 a2 00 00 03 00 00 00 00
10: 00 00 00 fc 0c 00 00 e0 00 00 00 00 04 00 00 fb
20: 00 00 00 00 00 00 00 00 00 00 00 00 28 10 ed 01
30: 00 00 00 00 48 00 00 00 00 00 00 00 0b 01 00 00
40: 28 10 ed 01 00 00 00 00 01 50 02 00 00 00 00 00
50: 05 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 01 00 00 00 04 00 00 00 00 00 00 00 01 00 00 00
70: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: 00 00 78 00 00 00 00 04 00 00 00 00 ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff

00:09.0 RAM memory: nVidia Corporation MCP51 Host Bridge (rev a2)
00: de 10 70 02 06 00 b0 00 a2 00 00 05 00 00 00 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 84 cb
30: 00 00 00 00 44 00 00 00 00 00 00 00 ff 00 00 00
40: de 10 84 cb 08 e0 e9 01 22 20 00 00 d0 00 00 00
50: 23 05 7f 80 03 00 00 00 00 00 03 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 06 36 05 00
70: 44 44 44 00 d0 09 00 00 11 00 00 00 11 11 55 00
80: 23 55 55 00 fa 00 64 0c 03 00 00 00 7f 00 00 00
90: 78 00 00 a0 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 01 01 01 01 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 80 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 08 00 00 a8 00 00 e0 fe 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:0a.0 ISA bridge: nVidia Corporation MCP51 LPC Bridge (rev a3)
00: de 10 60 02 0f 00 a0 00 a3 00 01 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 28 10 ed 01
30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00
40: 28 10 ed 01 00 00 ff fe fa 3e ff 00 fa 3e ff 00
50: fa 3e ff 00 00 5a 62 02 00 00 00 01 00 00 ff ff
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f9 ff
70: 10 00 ff ff c5 00 00 00 00 00 04 19 00 c0 30 00
80: 09 20 00 d8 01 10 00 00 c0 00 00 01 00 00 00 00
90: 00 00 00 00 00 00 00 00 21 47 65 b7 ef cd 00 00
a0: 00 00 10 80 00 00 01 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 08 80 08 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00

00:0a.1 SMBus: nVidia Corporation MCP51 SMBus (rev a3)
00: de 10 64 02 01 00 b0 00 a3 00 05 0c 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 01 1c 00 00 41 1c 00 00 00 00 00 00 28 10 ed 01
30: 00 00 00 00 44 00 00 00 00 00 00 00 0a 01 00 00
40: 28 10 ed 01 01 00 02 c0 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 01 10 00 00 01 14 00 00 01 18 00 00 00 00 00 00
70: 01 00 00 00 00 00 c8 fe 00 00 fe fe 01 20 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: d4 30 80 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 08 10 05 00 00 a0 80 00 80 74 00 00 41 44 44 11
f0: 5a ff 5f bf 00 00 00 c0 10 00 00 00 00 00 00 00

00:0a.2 RAM memory: nVidia Corporation MCP51 Memory Controller 0 (rev a3)
00: de 10 72 02 00 04 a0 00 a3 00 00 05 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 28 10 ed 01
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 10 00 00 10 00 00 10 10
50: 10 10 10 10 00 00 00 00 00 00 00 00 00 00 00 00
60: 02 03 00 00 12 00 00 00 02 00 00 00 10 01 12 00
70: 32 33 00 00 03 00 00 00 00 00 00 00 12 01 00 00
80: 10 00 00 00 00 00 00 00 00 00 00 00 30 02 00 00
90: 00 00 00 00 01 20 00 00 01 00 00 00 00 09 00 00
a0: 01 02 00 00 00 10 00 00 05 00 00 00 01 00 00 00
b0: 00 10 00 80 01 00 00 80 00 00 00 00 02 00 00 00
c0: 07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:0b.0 USB Controller: nVidia Corporation MCP51 USB Controller (rev a3)
00: de 10 6d 02 07 00 b0 00 a3 10 03 0c 00 00 80 00
10: 00 f0 02 fe 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 28 10 ed 01
30: 00 00 00 00 44 00 00 00 00 00 00 00 0f 01 03 01
40: 28 10 ed 01 01 00 02 fe 00 00 00 00 00 00 00 00
50: 08 00 00 00 1d 47 40 00 10 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:0b.1 USB Controller: nVidia Corporation MCP51 USB Controller (rev a3)
00: de 10 6e 02 06 00 b0 00 a3 20 03 0c 00 00 80 00
10: 00 e0 02 fe 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 28 10 ed 01
30: 00 00 00 00 44 00 00 00 00 00 00 00 05 02 03 01
40: 28 10 ed 01 0a 80 98 20 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 20 20 01 00 00 60 18 85 03 3c 0a 01 00 00 00 00
70: 00 00 08 05 00 10 20 80 89 3d b6 22 77 25 04 00
80: 01 00 02 fe 00 00 00 00 00 00 00 00 15 16 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 01 00 00 01 00 00 08 c0 00 00 00 00 00 00 00 00
b0: 00 11 22 33 00 00 00 00 ff 00 00 00 00 00 00 00
c0: 10 10 2d 0d 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00

00:0e.0 IDE interface: nVidia Corporation MCP51 Serial ATA Controller (rev a1)
00: de 10 66 02 07 00 b0 00 a1 85 01 01 00 00 00 00
10: f1 09 00 00 f1 0b 00 00 71 09 00 00 71 0b 00 00
20: 01 e0 00 00 00 d0 02 fe 00 00 00 00 28 10 ed 01
30: 00 00 00 00 44 00 00 00 00 00 00 00 0b 01 03 01
40: 28 10 ed 01 01 b0 02 00 00 00 00 00 00 00 00 00
50: 03 00 00 00 00 00 00 00 a8 20 a8 20 66 00 20 20
60: 00 c6 00 c7 51 0c 00 00 00 0f 06 42 00 00 00 00
70: 2c 78 c4 40 01 10 00 00 01 10 00 00 20 00 20 00
80: 00 00 00 c0 00 60 f9 22 00 00 08 a0 00 fc 00 00
90: 00 00 08 80 00 00 00 00 06 00 06 10 00 00 01 01
a0: 14 10 00 2a 00 00 00 00 00 00 00 00 33 33 00 02
b0: 05 cc 84 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 0a 00 0a 00 08 00 02 a8
d0: 0a 00 02 6c 42 00 00 00 00 00 00 00 00 00 00 e0
e0: 0a 00 02 36 42 00 00 00 00 00 00 00 90 42 44 83
f0: 00 00 00 00 00 00 00 00 00 00 0c 00 00 00 00 00

00:0f.0 IDE interface: nVidia Corporation MCP51 Serial ATA Controller (rev a1)
00: de 10 67 02 07 00 b0 00 a1 85 01 01 00 00 00 00
10: e1 09 00 00 e1 0b 00 00 61 09 00 00 61 0b 00 00
20: 01 cc 00 00 00 c0 02 fe 00 00 00 00 28 10 ed 01
30: 00 00 00 00 44 00 00 00 00 00 00 00 0a 01 03 01
40: 28 10 ed 01 01 b0 02 00 00 00 00 00 00 00 00 00
50: 03 00 00 00 00 00 00 00 a8 a8 a8 a8 aa 00 99 99
60: 00 00 00 00 51 0c 00 00 00 0f 06 42 00 00 00 00
70: 2c 78 c4 40 01 10 00 00 01 10 00 00 20 00 20 00
80: 00 00 00 00 d6 38 45 ff 00 00 c1 30 5e 61 bf ae
90: 00 00 1e 09 00 00 00 00 06 00 06 10 00 00 01 01
a0: 14 10 00 00 00 00 00 00 00 00 00 00 33 33 00 02
b0: 05 cc 84 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 0a 00 0a 00 08 00 02 a8
d0: 0a 00 02 36 42 00 00 00 00 00 00 00 01 00 80 00
e0: 0a 00 02 36 42 00 00 00 00 00 00 00 82 02 01 04
f0: 00 00 00 00 00 00 00 00 00 00 0c 00 00 00 00 00

00:10.0 PCI bridge: nVidia Corporation MCP51 PCI Bridge (rev a2)
00: de 10 6f 02 07 00 b0 00 a2 01 04 06 00 00 81 00
10: 00 00 00 00 00 00 00 00 00 04 04 20 90 90 80 02
20: b0 fd b0 fd a0 fd a0 fd 00 00 00 00 00 00 00 00
30: 00 00 00 00 b8 00 00 00 00 00 00 00 ff 00 04 02
40: 00 00 03 00 01 00 02 00 05 00 00 00 00 00 44 00
50: 00 00 fe 3f 00 00 00 00 ff 1f ff 1f 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 08 00 00 a8
90: 00 00 e0 fe 00 00 00 00 00 00 00 00 00 00 00 00
a0: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 ff ff 00 00 0d 8c 00 00 00 00 00 00
c0: 00 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:10.1 Audio device: nVidia Corporation MCP51 High Definition Audio (rev a2)
00: de 10 6c 02 06 00 b0 00 a2 00 03 04 00 00 80 00
10: 00 40 02 fe 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 28 10 ed 01
30: 00 00 00 00 44 00 00 00 00 00 00 00 0a 02 02 05
40: 28 10 ed 01 01 50 02 c0 00 00 00 00 01 01 0f 00
50: 05 6c 80 01 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 0f 00 00 00 08 00 02 a8
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 46 00 29 00 00 00 00 00 00

00:18.0 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration
00: 22 10 00 11 00 00 10 00 00 00 00 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 80 00 00 00 00 00 00 00 00 00 00 00
40: 01 01 01 00 01 01 01 00 01 01 01 00 01 01 01 00
50: 01 01 01 00 01 01 01 00 01 01 01 00 01 01 01 00
60: 00 00 01 00 e4 00 00 00 20 c8 0e 0f 0c 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 08 00 01 21 20 00 11 11 22 06 75 80 02 00 00 00
90: 69 01 61 01 00 00 04 00 07 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:18.1 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map
00: 22 10 01 11 00 00 00 00 00 00 00 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
40: 03 00 00 00 00 00 3f 00 00 00 00 00 01 00 00 00
50: 00 00 00 00 02 00 00 00 00 00 00 00 03 00 00 00
60: 00 00 00 00 04 00 00 00 00 00 00 00 05 00 00 00
70: 00 00 00 00 06 00 00 00 00 00 00 00 07 00 00 00
80: 03 0a 00 00 00 0b 00 00 00 00 00 00 00 00 00 00
90: 03 00 40 00 00 ff ef 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 03 00 f4 00 00 02 fe 00
b0: 03 00 f0 00 80 4f f0 00 00 00 00 00 00 00 00 00
c0: 13 80 00 00 00 f0 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 03 00 00 04 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:18.2 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller
00: 22 10 02 11 00 00 00 00 00 00 00 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 e0 3f 38 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 46 00 00 00 00 00 00 00
80: 20 00 00 00 00 00 00 00 24 c2 6a ae 20 13 82 00
90: 10 0c 01 00 5a 80 00 67 39 00 00 80 00 00 00 00
a0: ef 02 00 ae 00 00 00 00 00 00 00 00 00 00 00 00
b0: ef 65 f6 9f ce 00 00 00 27 19 20 20 92 4c c7 4c
c0: 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: ac 7e 5f 3b 5d 3b bf c3 45 85 7f 7d 40 94 08 61
e0: 61 3a ff 73 38 59 d5 61 85 ce 2d 67 af 61 8c 1a
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:18.3 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control
00: 22 10 03 11 00 00 10 00 00 00 00 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 f0 00 00 00 00 00 00 00 00 00 00 00
40: ff 3b 04 00 40 00 10 0a 00 00 00 00 00 00 00 00
50: 68 43 29 d8 0d 00 00 00 00 00 00 00 80 39 91 97
60: 23 00 00 00 01 77 1f 00 00 00 00 00 00 00 00 00
70: 11 01 32 51 21 40 70 50 00 2a 00 08 17 21 00 00
80: 00 00 07 23 13 21 13 21 00 00 00 00 00 00 00 00
90: 00 00 00 00 e2 0c 00 00 10 90 8d 0e 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 01 a7 0d 00 00 00 a0 08 25 25 25 00
e0: 00 00 00 00 24 1a 4e 00 19 17 00 00 00 00 00 00
f0: 0f 00 10 00 00 00 00 00 00 00 00 00 b2 0f 04 00

01:00.0 Ethernet controller: Intel Corporation 82572EI Gigabit Ethernet Controller (Copper) (rev 06)
00: 86 80 b9 10 07 04 18 00 06 00 00 02 10 00 00 00
10: 00 00 8e fd 00 00 8c fd 01 ac 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 83 10
30: 00 00 00 00 c8 00 00 00 00 00 00 00 07 01 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 01 d0 22 c8 00 20 00 21
d0: 05 e0 81 00 00 00 e0 fe 00 00 00 00 81 40 00 00
e0: 10 00 01 00 c1 0c 00 00 10 28 1a 00 11 64 03 02
f0: 40 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00

04:07.0 Ethernet controller: Broadcom Corporation BCM4401-B0 100Base-TX (rev 02)
00: e4 14 0c 17 06 00 10 00 02 00 00 02 00 40 00 00
10: 00 e0 bf fd 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 28 10 ed 01
30: 00 00 00 00 40 00 00 00 00 00 00 00 05 01 00 00
40: 01 00 02 fe 00 40 00 34 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 18 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

Re: 2.6.20-rc7: known regressions (v2) (part 1)

[Eric W. Biederman]

"Adam Kropelin" <akropel1@rochester.rr.com> writes:

>> Can I get the corresponding lspci -xxx output.  I suspect the BIOS
>> did not program the hypertransport MSI mapping capabilities correctly.
>> All it has to do is set the enable but still, occasionally BIOS
>> writers miss the most amazing things.
>
> Here you go. This is from 2.6.20-rc7.

Thanks.  Conclusion.  I could not find bit 16 (the enable bit) set in any of
your hypertransport msi mapping capabilities.

So MSI interrupts won't work until someone enables your chipset
to transform them into hypertransport interrupts.

Ideally it is a BIOS issue, but it may be the kind of thing we can
fix up with quirks in the kernel.

Eric

Re: 2.6.20-rc7: known regressions (v2) (part 1)

[Adam Kropelin]

Eric W. Biederman wrote:
> "Adam Kropelin" <akropel1@rochester.rr.com> writes:
>
>>> Can I get the corresponding lspci -xxx output.  I suspect the BIOS
>>> did not program the hypertransport MSI mapping capabilities
>>> correctly. All it has to do is set the enable but still,
>>> occasionally BIOS writers miss the most amazing things.
>>
>> Here you go. This is from 2.6.20-rc7.
>
> Thanks.  Conclusion.  I could not find bit 16 (the enable bit) set in
> any of your hypertransport msi mapping capabilities.
>
> So MSI interrupts won't work until someone enables your chipset
> to transform them into hypertransport interrupts.

Naive question... Can the pci layer (or e1000) detect that MSI is not 
enabled in the hardware and avoid using it in that case? With the number 
of MSI problems showing up it seems risky to assume it's usable on any 
given platform without some sort of sanity check.

--Adam

Re: 2.6.20-rc7: known regressions (v2) (part 1)

[Eric W. Biederman]

"Adam Kropelin" <akropel1@rochester.rr.com> writes:

> Naive question... Can the pci layer (or e1000) detect that MSI is not enabled in
> the hardware and avoid using it in that case? With the number of MSI problems
> showing up it seems risky to assume it's usable on any given platform without
> some sort of sanity check.
>

Yes, that is what we should do.  Start with the assumption MSI doesn't work
and enable it when we detect the hardware is setup properly.

Thing is that is going to take a little bit of work, and a little bit of
thinking on how to structure it properly.  So in real time it is going
to be a couple of weeks before the code to do that is ready.

Right now the model is that piecemeal we put in the code to
conditionally turn off chipsets that are known to have problems.
Which for building a reliable system when MSI isn't mandatory for
operation seems backwards.

Probably in addition we should have a warning such as:
"Found devices supporting MSI and but chipset is unknown".

Eric