Re: [PATCH 1/2] [DM9000] Added support for big-endian hosts

[Laurent Pinchart <laurentp@cse-semaphore.com>]

On Saturday 25 August 2007 06:31, Jeff Garzik wrote:
> Laurent Pinchart wrote:
> > This patch splits the receive status in 8bit wide fields and convert the
> > packet length from little endian to CPU byte order.
> >
> > Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
> > ---
> >  drivers/net/dm9000.c |   13 +++++++------
> >  1 files changed, 7 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/net/dm9000.c b/drivers/net/dm9000.c
> > index c3de81b..a424810 100644
> > --- a/drivers/net/dm9000.c
> > +++ b/drivers/net/dm9000.c
> > @@ -894,7 +894,8 @@ dm9000_timer(unsigned long data)
> >  }
> >
> >  struct dm9000_rxhdr {
> > -	u16	RxStatus;
> > +	u8	RxPktReady;
> > +	u8	RxStatus;
> >  	u16	RxLen;
> >  } __attribute__((__packed__));
>
> why does this not need endian conversions as well?
>
> 	Jeff

The rx header is a 4-byte structure layed out as above (packet ready, status 
and length). The first two fields are 8-bit wide so don't need endian 
conversion. The length field is a 16-bit big endian value which is converted 
to CPU order in dm9000_rx().

Before this patch, the driver accessed the status and packet ready fields as a 
16-bit value, which was obviously endianess-dependant.

Best regards,

-- 
Laurent Pinchart
CSE Semaphore Belgium

Chaussée de Bruxelles, 732A
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