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From: Oliver Martin <oliver.martin@student.tuwien.ac.at>
To: Oliver Martin <oliver.martin@student.tuwien.ac.at>
Cc: netdev@vger.kernel.org, hvr@gnu.org, buytenh@wantstofly.org
Subject: [PATCH] Re: ep93xx_eth PHY problems
Date: Fri, 21 Mar 2008 20:22:02 +0100	[thread overview]
Message-ID: <20080321202202.129c1239@ors> (raw)
In-Reply-To: <47CD4857.2060406@student.tuwien.ac.at>

Am Tue, 04 Mar 2008 14:02:15 +0100
schrieb Oliver Martin <oliver.martin@student.tuwien.ac.at>:
> 
> Now I'm having different problems: When auto-negotiation is enabled,
> it sometimes randomly changes the link state:
> 
> PHY: 0:01 - Link is Down
> PHY: 0:01 - Link is Up - 100/Full
> 

I've found at least one part of the problem. The MDIO clock divisor
wasn't set again after the reset in ep93xx_start_hw. It was left at the
default, resulting in a 12.5 MHz clock, which the PHY (Micrel KSZ8721BL)
didn't like too much. Calling ep93xx_mdio_reset after the reset fixed
it, the link is now perfectly stable in auto-negotiation mode.

There still seems to be another bug with auto-negotiation disabled: It
doesn't switch to 1000 Mbps any more, but most times it doesn't stay in
the intended configuration either. I haven't done any extensive
testing of this yet, though.

Signed-off-by: Oliver Martin <oliver.martin@student.tuwien.ac.at>

--- linux-2.6.24-phy/drivers/net/arm/ep93xx_eth.c.orig	2008-03-19 15:18:29.000000000 +0100
+++ linux-2.6.24-phy/drivers/net/arm/ep93xx_eth.c	2008-03-19 15:43:44.000000000 +0100
@@ -535,6 +535,22 @@ err:
 	return 1;
 }
 
+static int ep93xx_mdio_reset(struct mii_bus *bus)
+{
+	struct ep93xx_priv *ep = bus->priv;
+
+	u32 selfctl = rdl(ep, REG_SELFCTL);
+
+	selfctl &= ~(REG_SELFCTL_MDCDIV_MSK | REG_SELFCTL_PSPRS);
+
+	selfctl |= (ep->mdc_divisor - 1) << REG_SELFCTL_MDCDIV_OFS;
+	selfctl |= REG_SELFCTL_PSPRS;
+
+	wrl(ep, REG_SELFCTL, selfctl);
+
+	return 0;
+}
+
 static int ep93xx_start_hw(struct net_device *dev)
 {
 	struct ep93xx_priv *ep = netdev_priv(dev);
@@ -553,6 +569,9 @@ static int ep93xx_start_hw(struct net_de
 		return 1;
 	}
 
+	/* The reset cleared REG_SELFCTL, so set the MDC divisor again */
+	ep93xx_mdio_reset(&ep->mii_bus);
+
 	/* Receive descriptor ring.  */
 	addr = ep->descs_dma_addr + offsetof(struct ep93xx_descs, rdesc);
 	wrl(ep, REG_RXDQBADD, addr);
@@ -776,22 +795,6 @@ static int ep93xx_mdio_write(struct mii_
 	return 0;
 }
 
-static int ep93xx_mdio_reset(struct mii_bus *bus)
-{
-	struct ep93xx_priv *ep = bus->priv;
-
-	u32 selfctl = rdl(ep, REG_SELFCTL);
-
-	selfctl &= ~(REG_SELFCTL_MDCDIV_MSK | REG_SELFCTL_PSPRS);
-
-	selfctl |= (ep->mdc_divisor - 1) << REG_SELFCTL_MDCDIV_OFS;
-	selfctl |= REG_SELFCTL_PSPRS;
-
-	wrl(ep, REG_SELFCTL, selfctl);
-
-	return 0;
-}
-
 
 static void ep93xx_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
 {

  reply	other threads:[~2008-03-21 19:22 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-03-04 13:02 ep93xx_eth PHY problems Oliver Martin
2008-03-21 19:22 ` Oliver Martin [this message]
2008-03-26  4:42   ` [PATCH] " Jeff Garzik
2008-03-29 18:13     ` Oliver Martin
2008-03-29 18:17       ` Lennert Buytenhek
2008-09-14  2:11   ` Jeff Garzik
2008-09-14 11:47     ` Lennert Buytenhek
2008-09-14 11:58       ` Herbert Valerio Riedel
2008-09-14 12:11     ` Oliver Martin
2008-09-14 12:12       ` Lennert Buytenhek
2008-09-14 12:24         ` Oliver Martin
2008-09-16 12:51       ` Lennert Buytenhek
2008-09-17  9:13         ` Oliver Martin

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