[PATCH 0/4] Use new PCI PM code for Wake-on-LAN in some drivers

[PATCH 0/4] Use new PCI PM code for Wake-on-LAN in some drivers

[Rafael J. Wysocki]

Hi,

The following series of patches adapts some PCI LAN drivers to use the new core
PCI wake-up code for Wake-on-LAN.  The following drivers are modified:

skge (tested on Asus L5D)
tg3 (tested on HP nx6325)
sky2 (tested on a desktop with the Asus M3A32-MVP mainboard)

The patches are on top of the current mainline.

Thanks,
Rafael

[PATCH 1/4] skge: Adapt skge to use reworked PCI PM

[Rafael J. Wysocki]

From: Rafael J. Wysocki <rjw@sisk.pl>

Adapt the skge driver to use the reworked PCI PM.

Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
---
 drivers/net/skge.c |   38 +++++++++++---------------------------
 1 file changed, 11 insertions(+), 27 deletions(-)

Index: linux-next/drivers/net/skge.c
===================================================================
--- linux-next.orig/drivers/net/skge.c
+++ linux-next/drivers/net/skge.c
@@ -149,24 +149,6 @@ static u32 wol_supported(const struct sk
 	return WAKE_MAGIC | WAKE_PHY;
 }
 
-static u32 pci_wake_enabled(struct pci_dev *dev)
-{
-	int pm = pci_find_capability(dev, PCI_CAP_ID_PM);
-	u16 value;
-
-	/* If device doesn't support PM Capabilities, but request is to disable
-	 * wake events, it's a nop; otherwise fail */
-	if (!pm)
-		return 0;
-
-	pci_read_config_word(dev, pm + PCI_PM_PMC, &value);
-
-	value &= PCI_PM_CAP_PME_MASK;
-	value >>= ffs(PCI_PM_CAP_PME_MASK) - 1;   /* First bit of mask */
-
-	return value != 0;
-}
-
 static void skge_wol_init(struct skge_port *skge)
 {
 	struct skge_hw *hw = skge->hw;
@@ -254,10 +236,14 @@ static int skge_set_wol(struct net_devic
 	struct skge_port *skge = netdev_priv(dev);
 	struct skge_hw *hw = skge->hw;
 
-	if (wol->wolopts & ~wol_supported(hw))
+	if ((wol->wolopts & ~wol_supported(hw))
+	    || !device_can_wakeup(&hw->pdev->dev))
 		return -EOPNOTSUPP;
 
 	skge->wol = wol->wolopts;
+
+	device_set_wakeup_enable(&hw->pdev->dev, skge->wol);
+
 	return 0;
 }
 
@@ -3842,7 +3828,7 @@ static struct net_device *skge_devinit(s
 	skge->speed = -1;
 	skge->advertising = skge_supported_modes(hw);
 
-	if (pci_wake_enabled(hw->pdev))
+	if (device_may_wakeup(&hw->pdev->dev))
 		skge->wol = wol_supported(hw) & WAKE_MAGIC;
 
 	hw->dev[port] = dev;
@@ -4068,8 +4054,8 @@ static int skge_suspend(struct pci_dev *
 	}
 
 	skge_write32(hw, B0_IMSK, 0);
-	pci_enable_wake(pdev, pci_choose_state(pdev, state), wol);
-	pci_set_power_state(pdev, pci_choose_state(pdev, state));
+
+	pci_prepare_to_sleep(pdev);
 
 	return 0;
 }
@@ -4082,7 +4068,7 @@ static int skge_resume(struct pci_dev *p
 	if (!hw)
 		return 0;
 
-	err = pci_set_power_state(pdev, PCI_D0);
+	err = pci_back_from_sleep(pdev);
 	if (err)
 		goto out;
 
@@ -4090,8 +4076,6 @@ static int skge_resume(struct pci_dev *p
 	if (err)
 		goto out;
 
-	pci_enable_wake(pdev, PCI_D0, 0);
-
 	err = skge_reset(hw);
 	if (err)
 		goto out;
@@ -4132,8 +4116,8 @@ static void skge_shutdown(struct pci_dev
 		wol |= skge->wol;
 	}
 
-	pci_enable_wake(pdev, PCI_D3hot, wol);
-	pci_enable_wake(pdev, PCI_D3cold, wol);
+	if (pci_enable_wake(pdev, PCI_D3cold, wol))
+		pci_enable_wake(pdev, PCI_D3hot, wol);
 
 	pci_disable_device(pdev);
 	pci_set_power_state(pdev, PCI_D3hot);

[PATCH 2/4] PCI PM: Make more PCI PM core functionality available to drivers

[Rafael J. Wysocki]

From: Rafael J. Wysocki <rjw@sisk.pl>

Make more PCI PM core functionality available to drivers

* Export pci_pme_capable() so that it can be called directly by
  drivers (for example, tg3 needs that).

* Move the state choosing part of pci_prepare_to_sleep() to a
  separate function, pci_target_state(), that can be called directly
  by drivers (for example, tg3 needs that).

Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
---
 drivers/pci/pci.c   |   35 +++++++++++++++++++++++++----------
 include/linux/pci.h |    2 ++
 2 files changed, 27 insertions(+), 10 deletions(-)

Index: linux-next/drivers/pci/pci.c
===================================================================
--- linux-next.orig/drivers/pci/pci.c
+++ linux-next/drivers/pci/pci.c
@@ -1040,7 +1040,7 @@ int pci_set_pcie_reset_state(struct pci_
  * @dev: PCI device to handle.
  * @state: PCI state from which device will issue PME#.
  */
-static bool pci_pme_capable(struct pci_dev *dev, pci_power_t state)
+bool pci_pme_capable(struct pci_dev *dev, pci_power_t state)
 {
 	if (!dev->pm_cap)
 		return false;
@@ -1123,18 +1123,11 @@ int pci_enable_wake(struct pci_dev *dev,
 }
 
 /**
- * pci_prepare_to_sleep - prepare PCI device for system-wide transition into
- *                        a sleep state
- * @dev: Device to handle.
  *
- * Choose the power state appropriate for the device depending on whether
- * it can wake up the system and/or is power manageable by the platform
- * (PCI_D3hot is the default) and put the device into that state.
  */
-int pci_prepare_to_sleep(struct pci_dev *dev)
+pci_power_t pci_target_state(struct pci_dev *dev)
 {
 	pci_power_t target_state = PCI_D3hot;
-	int error;
 
 	if (platform_pci_power_manageable(dev)) {
 		/*
@@ -1161,7 +1154,7 @@ int pci_prepare_to_sleep(struct pci_dev 
 		 * to generate PME#.
 		 */
 		if (!dev->pm_cap)
-			return -EIO;
+			return PCI_POWER_ERROR;
 
 		if (dev->pme_support) {
 			while (target_state
@@ -1170,6 +1163,26 @@ int pci_prepare_to_sleep(struct pci_dev 
 		}
 	}
 
+	return target_state;
+}
+
+/**
+ * pci_prepare_to_sleep - prepare PCI device for system-wide transition into
+ *                        a sleep state
+ * @dev: Device to handle.
+ *
+ * Choose the power state appropriate for the device depending on whether
+ * it can wake up the system and/or is power manageable by the platform
+ * (PCI_D3hot is the default) and put the device into that state.
+ */
+int pci_prepare_to_sleep(struct pci_dev *dev)
+{
+	pci_power_t target_state = pci_target_state(dev);
+	int error;
+
+	if (target_state == PCI_POWER_ERROR)
+		return -EIO;
+
 	pci_enable_wake(dev, target_state, true);
 
 	error = pci_set_power_state(dev, target_state);
@@ -1920,7 +1933,9 @@ EXPORT_SYMBOL(pci_select_bars);
 EXPORT_SYMBOL(pci_set_power_state);
 EXPORT_SYMBOL(pci_save_state);
 EXPORT_SYMBOL(pci_restore_state);
+EXPORT_SYMBOL(pci_pme_capable);
 EXPORT_SYMBOL(pci_enable_wake);
+EXPORT_SYMBOL(pci_target_state);
 EXPORT_SYMBOL(pci_prepare_to_sleep);
 EXPORT_SYMBOL(pci_back_from_sleep);
 EXPORT_SYMBOL_GPL(pci_set_pcie_reset_state);
Index: linux-next/include/linux/pci.h
===================================================================
--- linux-next.orig/include/linux/pci.h
+++ linux-next/include/linux/pci.h
@@ -638,7 +638,9 @@ int pci_save_state(struct pci_dev *dev);
 int pci_restore_state(struct pci_dev *dev);
 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
+bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
+pci_power_t pci_target_state(struct pci_dev *dev);
 int pci_prepare_to_sleep(struct pci_dev *dev);
 int pci_back_from_sleep(struct pci_dev *dev);
 

[PATCH 3/4] tg3: Adapt tg3 to use reworked PCI PM code

[Rafael J. Wysocki]

From: Rafael J. Wysocki <rjw@sisk.pl>

Adapt tg3 to use reworked PCI PM code

Adapt the tg3 driver to use the reworked PCI PM and make it use
the exported PCI PM core functions instead of accessing the PCI PM
registers directly by itself.

Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
---
 drivers/net/tg3.c |   68 +++++++++++++++++++++++-------------------------------
 1 file changed, 29 insertions(+), 39 deletions(-)

Index: linux-2.6/drivers/net/tg3.c
===================================================================
--- linux-2.6.orig/drivers/net/tg3.c
+++ linux-2.6/drivers/net/tg3.c
@@ -1449,8 +1449,6 @@ static void tg3_power_down_phy(struct tg
 static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
 {
 	u32 misc_host_ctrl;
-	u16 power_control, power_caps;
-	int pm = tp->pm_cap;
 
 	/* Make sure register accesses (indirect or otherwise)
 	 * will function correctly.
@@ -1459,18 +1457,10 @@ static int tg3_set_power_state(struct tg
 			       TG3PCI_MISC_HOST_CTRL,
 			       tp->misc_host_ctrl);
 
-	pci_read_config_word(tp->pdev,
-			     pm + PCI_PM_CTRL,
-			     &power_control);
-	power_control |= PCI_PM_CTRL_PME_STATUS;
-	power_control &= ~(PCI_PM_CTRL_STATE_MASK);
 	switch (state) {
 	case PCI_D0:
-		power_control |= 0;
-		pci_write_config_word(tp->pdev,
-				      pm + PCI_PM_CTRL,
-				      power_control);
-		udelay(100);	/* Delay after power state change */
+		pci_enable_wake(tp->pdev, state, false);
+		pci_set_power_state(tp->pdev, PCI_D0);
 
 		/* Switch out of Vaux if it is a NIC */
 		if (tp->tg3_flags2 & TG3_FLG2_IS_NIC)
@@ -1479,25 +1469,15 @@ static int tg3_set_power_state(struct tg
 		return 0;
 
 	case PCI_D1:
-		power_control |= 1;
-		break;
-
 	case PCI_D2:
-		power_control |= 2;
-		break;
-
 	case PCI_D3hot:
-		power_control |= 3;
 		break;
 
 	default:
-		printk(KERN_WARNING PFX "%s: Invalid power state (%d) "
-		       "requested.\n",
-		       tp->dev->name, state);
+		printk(KERN_ERR PFX "%s: Invalid power state (D%d) requested\n",
+			tp->dev->name, state);
 		return -EINVAL;
-	};
-
-	power_control |= PCI_PM_CTRL_PME_ENABLE;
+	}
 
 	misc_host_ctrl = tr32(TG3PCI_MISC_HOST_CTRL);
 	tw32(TG3PCI_MISC_HOST_CTRL,
@@ -1539,8 +1519,6 @@ static int tg3_set_power_state(struct tg
 						     WOL_DRV_WOL |
 						     WOL_SET_MAGIC_PKT);
 
-	pci_read_config_word(tp->pdev, pm + PCI_PM_PMC, &power_caps);
-
 	if (tp->tg3_flags & TG3_FLAG_WOL_ENABLE) {
 		u32 mac_mode;
 
@@ -1571,8 +1549,8 @@ static int tg3_set_power_state(struct tg
 		if (!(tp->tg3_flags2 & TG3_FLG2_5750_PLUS))
 			tw32(MAC_LED_CTRL, tp->led_ctrl);
 
-		if (((power_caps & PCI_PM_CAP_PME_D3cold) &&
-		     (tp->tg3_flags & TG3_FLAG_WOL_ENABLE)))
+		if (pci_pme_capable(tp->pdev, state) &&
+		     (tp->tg3_flags & TG3_FLAG_WOL_ENABLE))
 			mac_mode |= MAC_MODE_MAGIC_PKT_ENABLE;
 
 		tw32_f(MAC_MODE, mac_mode);
@@ -1664,9 +1642,11 @@ static int tg3_set_power_state(struct tg
 
 	tg3_write_sig_post_reset(tp, RESET_KIND_SHUTDOWN);
 
+	if (tp->tg3_flags & TG3_FLAG_WOL_ENABLE)
+		pci_enable_wake(tp->pdev, state, true);
+
 	/* Finally, set the new power state. */
-	pci_write_config_word(tp->pdev, pm + PCI_PM_CTRL, power_control);
-	udelay(100);	/* Delay after power state change */
+	pci_set_power_state(tp->pdev, state);
 
 	return 0;
 }
@@ -8656,7 +8636,8 @@ static void tg3_get_wol(struct net_devic
 {
 	struct tg3 *tp = netdev_priv(dev);
 
-	if (tp->tg3_flags & TG3_FLAG_WOL_CAP)
+	if ((tp->tg3_flags & TG3_FLAG_WOL_CAP) &&
+	    device_can_wakeup(&tp->pdev->dev))
 		wol->supported = WAKE_MAGIC;
 	else
 		wol->supported = 0;
@@ -8669,18 +8650,22 @@ static void tg3_get_wol(struct net_devic
 static int tg3_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 {
 	struct tg3 *tp = netdev_priv(dev);
+	struct device *dp = &tp->pdev->dev;
 
 	if (wol->wolopts & ~WAKE_MAGIC)
 		return -EINVAL;
 	if ((wol->wolopts & WAKE_MAGIC) &&
-	    !(tp->tg3_flags & TG3_FLAG_WOL_CAP))
+	    !((tp->tg3_flags & TG3_FLAG_WOL_CAP) && device_can_wakeup(dp)))
 		return -EINVAL;
 
 	spin_lock_bh(&tp->lock);
-	if (wol->wolopts & WAKE_MAGIC)
+	if (wol->wolopts & WAKE_MAGIC) {
 		tp->tg3_flags |= TG3_FLAG_WOL_ENABLE;
-	else
+		device_set_wakeup_enable(dp, true);
+	} else {
 		tp->tg3_flags &= ~TG3_FLAG_WOL_ENABLE;
+		device_set_wakeup_enable(dp, false);
+	}
 	spin_unlock_bh(&tp->lock);
 
 	return 0;
@@ -10799,7 +10784,8 @@ static void __devinit tg3_get_eeprom_hw_
 		if (val & VCPU_CFGSHDW_ASPM_DBNC)
 			tp->tg3_flags |= TG3_FLAG_ASPM_WORKAROUND;
 		if ((val & VCPU_CFGSHDW_WOL_ENABLE) &&
-		    (val & VCPU_CFGSHDW_WOL_MAGPKT))
+		    (val & VCPU_CFGSHDW_WOL_MAGPKT) &&
+		    device_may_wakeup(&tp->pdev->dev))
 			tp->tg3_flags |= TG3_FLAG_WOL_ENABLE;
 		return;
 	}
@@ -10926,8 +10912,9 @@ static void __devinit tg3_get_eeprom_hw_
 		    !(nic_cfg & NIC_SRAM_DATA_CFG_FIBER_WOL))
 			tp->tg3_flags &= ~TG3_FLAG_WOL_CAP;
 
-		if (tp->tg3_flags & TG3_FLAG_WOL_CAP &&
-		    nic_cfg & NIC_SRAM_DATA_CFG_WOL_ENABLE)
+		if ((tp->tg3_flags & TG3_FLAG_WOL_CAP) &&
+		    (nic_cfg & NIC_SRAM_DATA_CFG_WOL_ENABLE) &&
+		    device_may_wakeup(&tp->pdev->dev))
 			tp->tg3_flags |= TG3_FLAG_WOL_ENABLE;
 
 		if (cfg2 & (1 << 17))
@@ -13091,6 +13078,7 @@ static int tg3_suspend(struct pci_dev *p
 {
 	struct net_device *dev = pci_get_drvdata(pdev);
 	struct tg3 *tp = netdev_priv(dev);
+	pci_power_t target_state;
 	int err;
 
 	/* PCI register 4 needs to be saved whether netif_running() or not.
@@ -13118,7 +13106,9 @@ static int tg3_suspend(struct pci_dev *p
 	tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE;
 	tg3_full_unlock(tp);
 
-	err = tg3_set_power_state(tp, pci_choose_state(pdev, state));
+	target_state = pdev->pm_cap ? pci_target_state(pdev) : PCI_D3hot;
+
+	err = tg3_set_power_state(tp, target_state);
 	if (err) {
 		tg3_full_lock(tp, 0);
 

[PATCH 4/4] sky2: Adapt sky2 to use reworked PCI PM

[Rafael J. Wysocki]

From: Rafael J. Wysocki <rjw@sisk.pl>

Adapt the sky2 driver to use the reworked PCI PM.

Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
---
 drivers/net/sky2.c |   42 +++++++++++++++---------------------------
 1 file changed, 15 insertions(+), 27 deletions(-)

Index: linux-2.6/drivers/net/sky2.c
===================================================================
--- linux-2.6.orig/drivers/net/sky2.c
+++ linux-2.6/drivers/net/sky2.c
@@ -2988,7 +2988,8 @@ static int sky2_set_wol(struct net_devic
 	struct sky2_port *sky2 = netdev_priv(dev);
 	struct sky2_hw *hw = sky2->hw;
 
-	if (wol->wolopts & ~sky2_wol_supported(sky2->hw))
+	if ((wol->wolopts & ~sky2_wol_supported(sky2->hw))
+	    || !device_can_wakeup(&hw->pdev->dev))
 		return -EOPNOTSUPP;
 
 	sky2->wol = wol->wolopts;
@@ -2999,8 +3000,8 @@ static int sky2_set_wol(struct net_devic
 		sky2_write32(hw, B0_CTST, sky2->wol
 			     ? Y2_HW_WOL_ON : Y2_HW_WOL_OFF);
 
-	if (!netif_running(dev))
-		sky2_wol_init(sky2);
+	device_set_wakeup_enable(&hw->pdev->dev, sky2->wol);
+
 	return 0;
 }
 
@@ -4120,18 +4121,6 @@ static int __devinit sky2_test_msi(struc
 	return err;
 }
 
-static int __devinit pci_wake_enabled(struct pci_dev *dev)
-{
-	int pm  = pci_find_capability(dev, PCI_CAP_ID_PM);
-	u16 value;
-
-	if (!pm)
-		return 0;
-	if (pci_read_config_word(dev, pm + PCI_PM_CTRL, &value))
-		return 0;
-	return value & PCI_PM_CTRL_PME_ENABLE;
-}
-
 static int __devinit sky2_probe(struct pci_dev *pdev,
 				const struct pci_device_id *ent)
 {
@@ -4170,7 +4159,7 @@ static int __devinit sky2_probe(struct p
 		}
 	}
 
-	wol_default = pci_wake_enabled(pdev) ? WAKE_MAGIC : 0;
+	wol_default = device_may_wakeup(&pdev->dev) ? WAKE_MAGIC : 0;
 
 	err = -ENOMEM;
 	hw = kzalloc(sizeof(*hw), GFP_KERNEL);
@@ -4335,7 +4324,8 @@ static void __devexit sky2_remove(struct
 static int sky2_suspend(struct pci_dev *pdev, pm_message_t state)
 {
 	struct sky2_hw *hw = pci_get_drvdata(pdev);
-	int i, wol = 0;
+	int i;
+	bool wol = false;
 
 	if (!hw)
 		return 0;
@@ -4351,10 +4341,10 @@ static int sky2_suspend(struct pci_dev *
 		if (netif_running(dev))
 			sky2_down(dev);
 
-		if (sky2->wol)
+		if (sky2->wol) {
+			wol = true;
 			sky2_wol_init(sky2);
-
-		wol |= sky2->wol;
+		}
 	}
 
 	sky2_write32(hw, B0_IMSK, 0);
@@ -4362,8 +4352,8 @@ static int sky2_suspend(struct pci_dev *
 	sky2_power_aux(hw);
 
 	pci_save_state(pdev);
-	pci_enable_wake(pdev, pci_choose_state(pdev, state), wol);
-	pci_set_power_state(pdev, pci_choose_state(pdev, state));
+
+	pci_prepare_to_sleep(pdev);
 
 	return 0;
 }
@@ -4376,7 +4366,7 @@ static int sky2_resume(struct pci_dev *p
 	if (!hw)
 		return 0;
 
-	err = pci_set_power_state(pdev, PCI_D0);
+	err = pci_back_from_sleep(pdev);
 	if (err)
 		goto out;
 
@@ -4384,8 +4374,6 @@ static int sky2_resume(struct pci_dev *p
 	if (err)
 		goto out;
 
-	pci_enable_wake(pdev, PCI_D0, 0);
-
 	/* Re-enable all clocks */
 	if (hw->chip_id == CHIP_ID_YUKON_EX ||
 	    hw->chip_id == CHIP_ID_YUKON_EC_U ||
@@ -4444,8 +4432,8 @@ static void sky2_shutdown(struct pci_dev
 	if (wol)
 		sky2_power_aux(hw);
 
-	pci_enable_wake(pdev, PCI_D3hot, wol);
-	pci_enable_wake(pdev, PCI_D3cold, wol);
+	if (pci_enable_wake(pdev, PCI_D3cold, wol))
+		pci_enable_wake(pdev, PCI_D3hot, wol);
 
 	pci_disable_device(pdev);
 	pci_set_power_state(pdev, PCI_D3hot);

Re: [PATCH 4/4] sky2: Adapt sky2 to use reworked PCI PM

[Andrew Morton]

On Sat, 19 Jul 2008 14:42:51 +0200 "Rafael J. Wysocki" <rjw@sisk.pl> wrote:

> Adapt the sky2 driver to use the reworked PCI PM.

I fixed the rejects in "[PATCH 3/4] tg3: Adapt tg3 to use reworked PCI
PM code" but this patch has too many for me to want to fix them.

As usual, please at least take a look at what's in linux-next before
going and bypassing all that queued work.

Patches 3 and 4 (which are Jeff things) depend upon patch 2, which is a
Jesse thing.  So I will attempt to not send patches 3 and 4 (assuming 4
gets fixed) to Jeff until Jesse has sent #2 into mainline.  This should
be interesting.

Re: [PATCH 2/4] PCI PM: Make more PCI PM core functionality available to drivers

[Jesse Barnes]

On Saturday, July 19, 2008 5:39 am Rafael J. Wysocki wrote:
> From: Rafael J. Wysocki <rjw@sisk.pl>
>
> Make more PCI PM core functionality available to drivers
>
> * Export pci_pme_capable() so that it can be called directly by
>   drivers (for example, tg3 needs that).
>
> * Move the state choosing part of pci_prepare_to_sleep() to a
>   separate function, pci_target_state(), that can be called directly
>   by drivers (for example, tg3 needs that).
>
> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>

Applied to for-linus.  I had to fix things up in light of the kdoc fixes Randy 
sent, but I think I got them right.

Thanks,
Jesse

Re: [PATCH 4/4] sky2: Adapt sky2 to use reworked PCI PM

[Rafael J. Wysocki]

[Sorry for the delayed response, I'm at OLS.]

On Monday, 21 of July 2008, Andrew Morton wrote:
> On Sat, 19 Jul 2008 14:42:51 +0200 "Rafael J. Wysocki" <rjw@sisk.pl> wrote:
> 
> > Adapt the sky2 driver to use the reworked PCI PM.
> 
> I fixed the rejects in "[PATCH 3/4] tg3: Adapt tg3 to use reworked PCI
> PM code" but this patch has too many for me to want to fix them.
> 
> As usual, please at least take a look at what's in linux-next before
> going and bypassing all that queued work.

Sorry for that.

Appended is a version of the patch applying to the current mainline on top of
patches 1/4 - 3/4 without rejects.

BTW, the sky2's WOL is broken on my test box because of commit
db99b98885e717454feef1c6868b27d3f23c2e7c ("sky2: put PHY in sleep when down")
that causes the box to hang solid in sky2_suspend() and sky2_shutdown() after
WOL has been enabled with 'ethtool -s eth0 wol g'.

This has already been reported to Stephen and Jeff.

Thanks,
Rafael

---
From: Rafael J. Wysocki <rjw@sisk.pl>

Adapt sky2 to use reworked PCI PM code

Adapt the sky2 driver to use the reworked PCI PM and make it use
the exported PCI PM core functions instead of accessing the PCI PM
registers directly by itself.

Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
---
 drivers/net/sky2.c |   55 ++++++++++++++++++-----------------------------------
 1 file changed, 19 insertions(+), 36 deletions(-)

Index: linux-2.6/drivers/net/sky2.c
===================================================================
--- linux-2.6.orig/drivers/net/sky2.c
+++ linux-2.6/drivers/net/sky2.c
@@ -277,7 +277,6 @@ static void sky2_power_aux(struct sky2_h
 
 static void sky2_power_state(struct sky2_hw *hw, pci_power_t state)
 {
-	u16 power_control = sky2_pci_read16(hw, hw->pm_cap + PCI_PM_CTRL);
 	int pex = pci_find_capability(hw->pdev, PCI_CAP_ID_EXP);
 	u32 reg;
 
@@ -285,19 +284,12 @@ static void sky2_power_state(struct sky2
 
 	switch (state) {
 	case PCI_D0:
-		break;
-
 	case PCI_D1:
-		power_control |= 1;
-		break;
-
 	case PCI_D2:
-		power_control |= 2;
 		break;
 
 	case PCI_D3hot:
 	case PCI_D3cold:
-		power_control |= 3;
 		if (hw->flags & SKY2_HW_ADV_POWER_CTL) {
 			/* additional power saving measurements */
 			reg = sky2_pci_read32(hw, PCI_DEV_REG4);
@@ -347,9 +339,8 @@ static void sky2_power_state(struct sky2
 		return;
 	}
 
-	power_control |= PCI_PM_CTRL_PME_ENABLE;
 	/* Finally, set the new power state. */
-	sky2_pci_write32(hw, hw->pm_cap + PCI_PM_CTRL, power_control);
+	pci_set_power_state(hw->pdev, state);
 
 	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
 	sky2_pci_read32(hw, B0_CTST);
@@ -3084,7 +3075,8 @@ static int sky2_set_wol(struct net_devic
 	struct sky2_port *sky2 = netdev_priv(dev);
 	struct sky2_hw *hw = sky2->hw;
 
-	if (wol->wolopts & ~sky2_wol_supported(sky2->hw))
+	if ((wol->wolopts & ~sky2_wol_supported(sky2->hw))
+	    || !device_can_wakeup(&hw->pdev->dev))
 		return -EOPNOTSUPP;
 
 	sky2->wol = wol->wolopts;
@@ -3095,8 +3087,8 @@ static int sky2_set_wol(struct net_devic
 		sky2_write32(hw, B0_CTST, sky2->wol
 			     ? Y2_HW_WOL_ON : Y2_HW_WOL_OFF);
 
-	if (!netif_running(dev))
-		sky2_wol_init(sky2);
+	device_set_wakeup_enable(&hw->pdev->dev, sky2->wol);
+
 	return 0;
 }
 
@@ -4216,18 +4208,6 @@ static int __devinit sky2_test_msi(struc
 	return err;
 }
 
-static int __devinit pci_wake_enabled(struct pci_dev *dev)
-{
-	int pm  = pci_find_capability(dev, PCI_CAP_ID_PM);
-	u16 value;
-
-	if (!pm)
-		return 0;
-	if (pci_read_config_word(dev, pm + PCI_PM_CTRL, &value))
-		return 0;
-	return value & PCI_PM_CTRL_PME_ENABLE;
-}
-
 /* This driver supports yukon2 chipset only */
 static const char *sky2_name(u8 chipid, char *buf, int sz)
 {
@@ -4288,7 +4268,7 @@ static int __devinit sky2_probe(struct p
 		}
 	}
 
-	wol_default = pci_wake_enabled(pdev) ? WAKE_MAGIC : 0;
+	wol_default = device_may_wakeup(&pdev->dev) ? WAKE_MAGIC : 0;
 
 	err = -ENOMEM;
 	hw = kzalloc(sizeof(*hw), GFP_KERNEL);
@@ -4453,7 +4433,9 @@ static void __devexit sky2_remove(struct
 static int sky2_suspend(struct pci_dev *pdev, pm_message_t state)
 {
 	struct sky2_hw *hw = pci_get_drvdata(pdev);
-	int i, wol = 0;
+	pci_power_t target_state;
+	int i;
+	bool wol = false;
 
 	if (!hw)
 		return 0;
@@ -4469,10 +4451,10 @@ static int sky2_suspend(struct pci_dev *
 		if (netif_running(dev))
 			sky2_down(dev);
 
-		if (sky2->wol)
+		if (sky2->wol) {
+			wol = true;
 			sky2_wol_init(sky2);
-
-		wol |= sky2->wol;
+		}
 	}
 
 	sky2_write32(hw, B0_IMSK, 0);
@@ -4480,8 +4462,10 @@ static int sky2_suspend(struct pci_dev *
 	sky2_power_aux(hw);
 
 	pci_save_state(pdev);
-	pci_enable_wake(pdev, pci_choose_state(pdev, state), wol);
-	sky2_power_state(hw, pci_choose_state(pdev, state));
+
+	target_state = pci_target_state(pdev);
+	pci_enable_wake(pdev, target_state, wol);
+	sky2_power_state(hw, target_state);
 
 	return 0;
 }
@@ -4494,14 +4478,13 @@ static int sky2_resume(struct pci_dev *p
 	if (!hw)
 		return 0;
 
+	pci_enable_wake(pdev, PCI_D0, false);
 	sky2_power_state(hw, PCI_D0);
 
 	err = pci_restore_state(pdev);
 	if (err)
 		goto out;
 
-	pci_enable_wake(pdev, PCI_D0, 0);
-
 	/* Re-enable all clocks */
 	if (hw->chip_id == CHIP_ID_YUKON_EX ||
 	    hw->chip_id == CHIP_ID_YUKON_EC_U ||
@@ -4560,8 +4543,8 @@ static void sky2_shutdown(struct pci_dev
 	if (wol)
 		sky2_power_aux(hw);
 
-	pci_enable_wake(pdev, PCI_D3hot, wol);
-	pci_enable_wake(pdev, PCI_D3cold, wol);
+	if (pci_enable_wake(pdev, PCI_D3cold, wol))
+		pci_enable_wake(pdev, PCI_D3hot, wol);
 
 	pci_disable_device(pdev);
 	sky2_power_state(hw, PCI_D3hot);

Re: [PATCH 4/4] sky2: Adapt sky2 to use reworked PCI PM

[Jesse Barnes]

On Thursday, July 24, 2008 1:50 pm Rafael J. Wysocki wrote:
> [Sorry for the delayed response, I'm at OLS.]
>
> On Monday, 21 of July 2008, Andrew Morton wrote:
> > On Sat, 19 Jul 2008 14:42:51 +0200 "Rafael J. Wysocki" <rjw@sisk.pl> 
wrote:
> > > Adapt the sky2 driver to use the reworked PCI PM.
> >
> > I fixed the rejects in "[PATCH 3/4] tg3: Adapt tg3 to use reworked PCI
> > PM code" but this patch has too many for me to want to fix them.
> >
> > As usual, please at least take a look at what's in linux-next before
> > going and bypassing all that queued work.
>
> Sorry for that.
>
> Appended is a version of the patch applying to the current mainline on top
> of patches 1/4 - 3/4 without rejects.
>
> BTW, the sky2's WOL is broken on my test box because of commit
> db99b98885e717454feef1c6868b27d3f23c2e7c ("sky2: put PHY in sleep when
> down") that causes the box to hang solid in sky2_suspend() and
> sky2_shutdown() after WOL has been enabled with 'ethtool -s eth0 wol g'.
>
> This has already been reported to Stephen and Jeff.

Btw, I just asked Linus to pull the 2/4 part of this patchset, so the rest 
should be able to go upstream soon.

Thanks,
Jesse

Re: [PATCH 4/4] sky2: Adapt sky2 to use reworked PCI PM

[Stephen Hemminger]

On Thu, 24 Jul 2008 22:50:50 +0200
"Rafael J. Wysocki" <rjw@sisk.pl> wrote:

> [Sorry for the delayed response, I'm at OLS.]
> 
> On Monday, 21 of July 2008, Andrew Morton wrote:
> > On Sat, 19 Jul 2008 14:42:51 +0200 "Rafael J. Wysocki" <rjw@sisk.pl> wrote:
> > 
> > > Adapt the sky2 driver to use the reworked PCI PM.
> > 
> > I fixed the rejects in "[PATCH 3/4] tg3: Adapt tg3 to use reworked PCI
> > PM code" but this patch has too many for me to want to fix them.
> > 
> > As usual, please at least take a look at what's in linux-next before
> > going and bypassing all that queued work.
> 
> Sorry for that.
> 
> Appended is a version of the patch applying to the current mainline on top of
> patches 1/4 - 3/4 without rejects.
> 
> BTW, the sky2's WOL is broken on my test box because of commit
> db99b98885e717454feef1c6868b27d3f23c2e7c ("sky2: put PHY in sleep when down")
> that causes the box to hang solid in sky2_suspend() and sky2_shutdown() after
> WOL has been enabled with 'ethtool -s eth0 wol g'.
> 
> This has already been reported to Stephen and Jeff.
> 
> Thanks,
> Rafael

Please wait, I am working on a better stable way to do this.

Re: [PATCH 4/4] sky2: Adapt sky2 to use reworked PCI PM

[Stephen Hemminger]

On Thu, 24 Jul 2008 13:52:18 -0700
Jesse Barnes <jbarnes@virtuousgeek.org> wrote:

> On Thursday, July 24, 2008 1:50 pm Rafael J. Wysocki wrote:
> > [Sorry for the delayed response, I'm at OLS.]
> >
> > On Monday, 21 of July 2008, Andrew Morton wrote:
> > > On Sat, 19 Jul 2008 14:42:51 +0200 "Rafael J. Wysocki" <rjw@sisk.pl> 
> wrote:
> > > > Adapt the sky2 driver to use the reworked PCI PM.
> > >
> > > I fixed the rejects in "[PATCH 3/4] tg3: Adapt tg3 to use reworked PCI
> > > PM code" but this patch has too many for me to want to fix them.
> > >
> > > As usual, please at least take a look at what's in linux-next before
> > > going and bypassing all that queued work.
> >
> > Sorry for that.
> >
> > Appended is a version of the patch applying to the current mainline on top
> > of patches 1/4 - 3/4 without rejects.
> >
> > BTW, the sky2's WOL is broken on my test box because of commit
> > db99b98885e717454feef1c6868b27d3f23c2e7c ("sky2: put PHY in sleep when
> > down") that causes the box to hang solid in sky2_suspend() and
> > sky2_shutdown() after WOL has been enabled with 'ethtool -s eth0 wol g'.
> >
> > This has already been reported to Stephen and Jeff.
> 
> Btw, I just asked Linus to pull the 2/4 part of this patchset, so the rest 
> should be able to go upstream soon.
> 
> Thanks,
> Jesse


Does this fix your WOL issue?

When doing wake on lan and resume, the PHY may need to get more
power up bits tweaked.

--- a/drivers/net/sky2.c	2008-07-24 15:35:33.000000000 -0700
+++ b/drivers/net/sky2.c	2008-07-24 15:43:44.000000000 -0700
@@ -698,6 +698,7 @@ static const u32 coma_mode[] = { PCI_Y2_
 static void sky2_phy_power_up(struct sky2_hw *hw, unsigned port)
 {
 	u32 reg1;
+	u16 ctrl;
 
 	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
 	reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
@@ -709,6 +710,33 @@ static void sky2_phy_power_up(struct sky
 	sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
 	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
 	sky2_pci_read32(hw, PCI_DEV_REG1);
+
+	if (hw->chip_id != CHIP_ID_YUKON_EC) {
+		if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
+			gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
+			ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
+
+			/* turn on GII power */
+			ctrl &= ~PHY_M_PC_POW_D_ENA;
+			gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
+		}
+	}
+
+	if (hw->flags & SKY2_HW_NEWER_PHY) {
+		/* select page 2 to access MAC control register */
+		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
+
+		ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
+		/* allow GMII Power Down */
+		ctrl |= PHY_M_MAC_GMIF_PUP;
+		gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
+
+		/* set page register back to 0 */
+		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
+	}
+
+	/* force phy reset and clear power down */
+	gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_RESET);
 }
 
 static void sky2_phy_power_down(struct sky2_hw *hw, unsigned port)
@@ -731,6 +759,9 @@ static void sky2_phy_power_down(struct s
 		ctrl &= ~PHY_M_MAC_GMIF_PUP;
 		gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
 
+		/* this register change must be followed by a software reset */
+		gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_RESET);
+
 		/* set page register back to 0 */
 		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
 	}

Re: [PATCH 4/4] sky2: Adapt sky2 to use reworked PCI PM

[Rafael J. Wysocki]

On Friday, 25 of July 2008, Stephen Hemminger wrote:
> On Thu, 24 Jul 2008 13:52:18 -0700
> Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> 
> > On Thursday, July 24, 2008 1:50 pm Rafael J. Wysocki wrote:
> > > [Sorry for the delayed response, I'm at OLS.]
> > >
> > > On Monday, 21 of July 2008, Andrew Morton wrote:
> > > > On Sat, 19 Jul 2008 14:42:51 +0200 "Rafael J. Wysocki" <rjw@sisk.pl> 
> > wrote:
> > > > > Adapt the sky2 driver to use the reworked PCI PM.
> > > >
> > > > I fixed the rejects in "[PATCH 3/4] tg3: Adapt tg3 to use reworked PCI
> > > > PM code" but this patch has too many for me to want to fix them.
> > > >
> > > > As usual, please at least take a look at what's in linux-next before
> > > > going and bypassing all that queued work.
> > >
> > > Sorry for that.
> > >
> > > Appended is a version of the patch applying to the current mainline on top
> > > of patches 1/4 - 3/4 without rejects.
> > >
> > > BTW, the sky2's WOL is broken on my test box because of commit
> > > db99b98885e717454feef1c6868b27d3f23c2e7c ("sky2: put PHY in sleep when
> > > down") that causes the box to hang solid in sky2_suspend() and
> > > sky2_shutdown() after WOL has been enabled with 'ethtool -s eth0 wol g'.
> > >
> > > This has already been reported to Stephen and Jeff.
> > 
> > Btw, I just asked Linus to pull the 2/4 part of this patchset, so the rest 
> > should be able to go upstream soon.
> > 
> > Thanks,
> > Jesse
> 
> 
> Does this fix your WOL issue?
> 
> When doing wake on lan and resume, the PHY may need to get more
> power up bits tweaked.

At the moment I have no access to the affected machine.  I'll test it after
I return from OLS (most probably on Monday) and report back.

Thanks,
Rafael


---
> 
> --- a/drivers/net/sky2.c	2008-07-24 15:35:33.000000000 -0700
> +++ b/drivers/net/sky2.c	2008-07-24 15:43:44.000000000 -0700
> @@ -698,6 +698,7 @@ static const u32 coma_mode[] = { PCI_Y2_
>  static void sky2_phy_power_up(struct sky2_hw *hw, unsigned port)
>  {
>  	u32 reg1;
> +	u16 ctrl;
>  
>  	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
>  	reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
> @@ -709,6 +710,33 @@ static void sky2_phy_power_up(struct sky
>  	sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
>  	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
>  	sky2_pci_read32(hw, PCI_DEV_REG1);
> +
> +	if (hw->chip_id != CHIP_ID_YUKON_EC) {
> +		if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
> +			gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
> +			ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
> +
> +			/* turn on GII power */
> +			ctrl &= ~PHY_M_PC_POW_D_ENA;
> +			gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
> +		}
> +	}
> +
> +	if (hw->flags & SKY2_HW_NEWER_PHY) {
> +		/* select page 2 to access MAC control register */
> +		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
> +
> +		ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
> +		/* allow GMII Power Down */
> +		ctrl |= PHY_M_MAC_GMIF_PUP;
> +		gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
> +
> +		/* set page register back to 0 */
> +		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
> +	}
> +
> +	/* force phy reset and clear power down */
> +	gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_RESET);
>  }
>  
>  static void sky2_phy_power_down(struct sky2_hw *hw, unsigned port)
> @@ -731,6 +759,9 @@ static void sky2_phy_power_down(struct s
>  		ctrl &= ~PHY_M_MAC_GMIF_PUP;
>  		gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
>  
> +		/* this register change must be followed by a software reset */
> +		gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_RESET);
> +
>  		/* set page register back to 0 */
>  		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
>  	}
> 
> 

Re: [PATCH 4/4] sky2: Adapt sky2 to use reworked PCI PM

[Rafael J. Wysocki]

On Friday, 25 of July 2008, Stephen Hemminger wrote:
> On Thu, 24 Jul 2008 13:52:18 -0700
> Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> 
> > On Thursday, July 24, 2008 1:50 pm Rafael J. Wysocki wrote:
> > > [Sorry for the delayed response, I'm at OLS.]
> > >
> > > On Monday, 21 of July 2008, Andrew Morton wrote:
> > > > On Sat, 19 Jul 2008 14:42:51 +0200 "Rafael J. Wysocki" <rjw@sisk.pl> 
> > wrote:
> > > > > Adapt the sky2 driver to use the reworked PCI PM.
> > > >
> > > > I fixed the rejects in "[PATCH 3/4] tg3: Adapt tg3 to use reworked PCI
> > > > PM code" but this patch has too many for me to want to fix them.
> > > >
> > > > As usual, please at least take a look at what's in linux-next before
> > > > going and bypassing all that queued work.
> > >
> > > Sorry for that.
> > >
> > > Appended is a version of the patch applying to the current mainline on top
> > > of patches 1/4 - 3/4 without rejects.
> > >
> > > BTW, the sky2's WOL is broken on my test box because of commit
> > > db99b98885e717454feef1c6868b27d3f23c2e7c ("sky2: put PHY in sleep when
> > > down") that causes the box to hang solid in sky2_suspend() and
> > > sky2_shutdown() after WOL has been enabled with 'ethtool -s eth0 wol g'.
> > >
> > > This has already been reported to Stephen and Jeff.
> > 
> > Btw, I just asked Linus to pull the 2/4 part of this patchset, so the rest 
> > should be able to go upstream soon.
> > 
> > Thanks,
> > Jesse
> 
> 
> Does this fix your WOL issue?

Yes, the patch below fixes the issue in which the system hanged during
hibernation/power off after 'ethtool -s eth0 wol g' had been used.  This
actually is a regression fix, so please push it upstream ASAP.

However, even with this patch applied, the card doesn't work after a resume
from hibernation (even if the system was woken up using it ;-)).  ISTR that it
worked with vanilla 2.6.26, will verify tomorrow.

[As a side note, my patch 4/4 is still necessary so that the device's
/sys/devices/.../power/wakeup file is updated in accordance with the current
WOL setting and so that the callbacks provided by the PCI core are used
for accessing the standard PCI PM registers of the device.]


> When doing wake on lan and resume, the PHY may need to get more
> power up bits tweaked.
> 
> --- a/drivers/net/sky2.c	2008-07-24 15:35:33.000000000 -0700
> +++ b/drivers/net/sky2.c	2008-07-24 15:43:44.000000000 -0700
> @@ -698,6 +698,7 @@ static const u32 coma_mode[] = { PCI_Y2_
>  static void sky2_phy_power_up(struct sky2_hw *hw, unsigned port)
>  {
>  	u32 reg1;
> +	u16 ctrl;
>  
>  	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
>  	reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
> @@ -709,6 +710,33 @@ static void sky2_phy_power_up(struct sky
>  	sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
>  	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
>  	sky2_pci_read32(hw, PCI_DEV_REG1);
> +
> +	if (hw->chip_id != CHIP_ID_YUKON_EC) {
> +		if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
> +			gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
> +			ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
> +
> +			/* turn on GII power */
> +			ctrl &= ~PHY_M_PC_POW_D_ENA;
> +			gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
> +		}
> +	}
> +
> +	if (hw->flags & SKY2_HW_NEWER_PHY) {
> +		/* select page 2 to access MAC control register */
> +		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
> +
> +		ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
> +		/* allow GMII Power Down */
> +		ctrl |= PHY_M_MAC_GMIF_PUP;
> +		gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
> +
> +		/* set page register back to 0 */
> +		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
> +	}
> +
> +	/* force phy reset and clear power down */
> +	gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_RESET);
>  }
>  
>  static void sky2_phy_power_down(struct sky2_hw *hw, unsigned port)
> @@ -731,6 +759,9 @@ static void sky2_phy_power_down(struct s
>  		ctrl &= ~PHY_M_MAC_GMIF_PUP;
>  		gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
>  
> +		/* this register change must be followed by a software reset */
> +		gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_RESET);
> +
>  		/* set page register back to 0 */
>  		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
>  	}
> 
>