[PATCH 0/2] r8169: WoL fixes

[PATCH 0/2] r8169: WoL fixes

[Bruno Prémont]

As reported in bug #9512 [1], on my system, Commell LE-365 with
RTL-8169 NIC (02:08.0 Ethernet controller [0200]: Realtek
Semiconductor Co., Ltd. RTL-8169 Gigabit Ethernet [10ec:8169]
(rev 10)) reported as RTL8110s in dmesg, I need to do 3 steps to
get WoL working properly (the third step being new since 2.6.26
or 2.6.27):

  ethtool -s eth0 wol d > /dev/null && \
    ethtool -s eth0 wol g > /dev/null

  acpitool -w | grep 'P2PB.*enabled' > /dev/null || \
    acpitool -W 7 > /dev/null

  echo enabled > "/sys/bus/pci/devices/0000:02:08.0/power/wakeup"

The patches in reply to this message replace steps 1 and 3.

I'm not sure what is still missing as after shutdown (power-off)
WoL is not possible until a power-cycle. It seems like step 3
does slightly more that what the replacing patch does.


In an ideal world it looks like step 2 shall be done automatically
by PCI subsystem while processing call to pci_enable_wake() which
calls platform_pci_sleep_wake().

I have not analysed what platform_pci_sleep_wake() does and the
fact that on my machine there is no ACPI wake-up record for the
NIC itself but just one for the parent PCI brige (that one is
required for any WoL to effectively work) certainly does not help.

Bruno




[1] http://bugzilla.kernel.org/show_bug.cgi?id=9512

Output of `acpitool -w` with the PCI bridge enabled:
   Device       S-state   Status   Sysfs node
  ---------------------------------------
  1. SLPB         S5    *enabled   
  2. PCI0         S5     enabled   no-bus:pci0000:00
  3. USB1         S3     disabled  pci:0000:00:10.0
  4. USB2         S3     disabled  pci:0000:00:10.1
  5. USB3         S3     disabled  pci:0000:00:10.2
  6. EHCI         S3     disabled  pci:0000:00:10.4
  7. P2PB         S5     enabled   pci:0000:00:13.1
  8. UAR1         S5     disabled  pnp:00:07
  9. PS2K         S5     disabled  pnp:00:09
  10. AZAC        S5     disabled  pci:0000:80:01.0
)

Output of lspci -nn:
00:00.0 Host bridge [0600]: VIA Technologies, Inc. CX700 Host Bridge [1106:0324] (rev 03)
00:00.1 Host bridge [0600]: VIA Technologies, Inc. CX700 Host Bridge [1106:1324]
00:00.2 Host bridge [0600]: VIA Technologies, Inc. CX700 Host Bridge [1106:2324]
00:00.3 Host bridge [0600]: VIA Technologies, Inc. CX700 Host Bridge [1106:3324]
00:00.4 Host bridge [0600]: VIA Technologies, Inc. CX700 Host Bridge [1106:4324]
00:00.7 Host bridge [0600]: VIA Technologies, Inc. CX700 Host Bridge [1106:7324]
00:01.0 PCI bridge [0604]: VIA Technologies, Inc. VT8237 PCI Bridge [1106:b198]
00:0f.0 IDE interface [0101]: VIA Technologies, Inc. Device [1106:0581]
00:10.0 USB Controller [0c03]: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller [1106:3038] (rev 90)
00:10.1 USB Controller [0c03]: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller [1106:3038] (rev 90)
00:10.2 USB Controller [0c03]: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller [1106:3038] (rev 90)
00:10.4 USB Controller [0c03]: VIA Technologies, Inc. USB 2.0 [1106:3104] (rev 90)
00:11.0 ISA bridge [0601]: VIA Technologies, Inc. CX700 PCI to ISA Bridge [1106:8324]
00:11.7 Host bridge [0600]: VIA Technologies, Inc. CX700 Internal Module Bus [1106:324e]
00:13.0 Host bridge [0600]: VIA Technologies, Inc. CX700 Host Bridge [1106:324b]
00:13.1 PCI bridge [0604]: VIA Technologies, Inc. CX700 PCI to PCI Bridge [1106:324a]
01:00.0 VGA compatible controller [0300]: VIA Technologies, Inc. CX700M2 UniChrome PRO II Graphics [1106:3157] (rev 03)
02:08.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL-8169 Gigabit Ethernet [10ec:8169] (rev 10)
80:01.0 Audio device [0403]: VIA Technologies, Inc. VIA High Definition Audio Controller [1106:3288] (rev 10)

Output of lspci -t:
-+-[0000:80]---01.0
 \-[0000:00]-+-00.0
             +-00.1
             +-00.2
             +-00.3
             +-00.4
             +-00.7
             +-01.0-[0000:01]----00.0
             +-0f.0
             +-10.0
             +-10.1
             +-10.2
             +-10.4
             +-11.0
             +-11.7
             +-13.0
             \-13.1-[0000:02]----08.0

[PATCH 1/2] r8169: WoL fixes

[Bruno Prémont]

When probing the chip and handling it's power management settings
also remember wether WoL feature is enabled.

Without this patch one has to call ethtool to change WoL settings
for this flag to be set and any WoL being enabled on suspend to
RAM.

Signed-off-by: Bruno Prémont <bonbons@linux-vserver.org>
---
--- linux-2.6.27-rc8-git6.orig/drivers/net/r8169.c	2008-10-04 16:37:36.000000000 +0200
+++ linux-2.6.27-rc8-git6/drivers/net/r8169.c	2008-10-04 12:31:48.000000000 +0200
@@ -1706,6 +1706,10 @@ rtl8169_init_one(struct pci_dev *pdev, c
 	RTL_W8(Cfg9346, Cfg9346_Unlock);
 	RTL_W8(Config1, RTL_R8(Config1) | PMEnable);
 	RTL_W8(Config5, RTL_R8(Config5) & PMEStatus);
+	if ((RTL_R8(Config3) & (LinkUp | MagicPacket)) != 0)
+		tp->features |= RTL_FEATURE_WOL;
+	if ((RTL_R8(Config5) & (UWF | BWF | MWF)) != 0)
+		tp->features |= RTL_FEATURE_WOL;
 	tp->features |= rtl_try_msi(pdev, ioaddr, cfg);
 	RTL_W8(Cfg9346, Cfg9346_Lock);
 

[PATCH 2/2] r8169: WoL fixes

[Bruno Prémont]

Since recent kernel (2.6.26 or 2.6.27) the PCI wakeup functions are
influenced by generic device ability and configuration when enabling
PCI-device triggered wake-up.

This patch causes WoL setting to enable/disable device's wish to
be permitted to wake-up the host when changing WoL options and
also during device probing.

Without this patch one has write 'enabled' to
  /sys/bus/pci/devices/0000:02:08.0/power/wakeup

Signed-off-by: Bruno Prémont <bonbons@linux-vserver.org>
---
--- linux-2.6.27-rc8-git6.orig/drivers/net/r8169.c	2008-10-04 12:31:48.000000000 +0200
+++ linux-2.6.27-rc8-git6/drivers/net/r8169.c	2008-10-04 16:51:48.000000000 +0200
@@ -619,6 +619,7 @@ static int rtl8169_set_wol(struct net_de
 		tp->features |= RTL_FEATURE_WOL;
 	else
 		tp->features &= ~RTL_FEATURE_WOL;
+	device_set_wakeup_enable(&tp->pci_dev->dev, wol->wolopts);
 
 	spin_unlock_irq(&tp->lock);
 
@@ -1796,6 +1797,7 @@ rtl8169_init_one(struct pci_dev *pdev, c
 	}
 
 	rtl8169_init_phy(dev, tp);
+	device_set_wakeup_enable(&pdev->dev, tp->features & RTL_FEATURE_WOL);
 
 out:
 	return rc;
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Re: [PATCH 2/2] r8169: WoL fixes

[Rafael J. Wysocki]

On Saturday, 4 of October 2008, Bruno Prémont wrote:
> Since recent kernel (2.6.26 or 2.6.27) the PCI wakeup functions are
> influenced by generic device ability and configuration when enabling
> PCI-device triggered wake-up.
> 
> This patch causes WoL setting to enable/disable device's wish to
> be permitted to wake-up the host when changing WoL options and
> also during device probing.
> 
> Without this patch one has write 'enabled' to
>   /sys/bus/pci/devices/0000:02:08.0/power/wakeup
> 
> Signed-off-by: Bruno Prémont <bonbons@linux-vserver.org>

Acked-by: Rafael J. Wysocki <rjw@sisk.pl>

> ---
> --- linux-2.6.27-rc8-git6.orig/drivers/net/r8169.c	2008-10-04 12:31:48.000000000 +0200
> +++ linux-2.6.27-rc8-git6/drivers/net/r8169.c	2008-10-04 16:51:48.000000000 +0200
> @@ -619,6 +619,7 @@ static int rtl8169_set_wol(struct net_de
>  		tp->features |= RTL_FEATURE_WOL;
>  	else
>  		tp->features &= ~RTL_FEATURE_WOL;
> +	device_set_wakeup_enable(&tp->pci_dev->dev, wol->wolopts);
>  
>  	spin_unlock_irq(&tp->lock);
>  
> @@ -1796,6 +1797,7 @@ rtl8169_init_one(struct pci_dev *pdev, c
>  	}
>  
>  	rtl8169_init_phy(dev, tp);
> +	device_set_wakeup_enable(&pdev->dev, tp->features & RTL_FEATURE_WOL);
>  
>  out:
>  	return rc;
> 
> 


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