[PATCH 2.6.30] cxgb3: clear shadow BAR registers

[PATCH 2.6.30] cxgb3: clear shadow BAR registers

[Divy Le Ray]

From: Divy Le Ray <divy@chelsio.com>

Ensure that internal shadow BAR registers are cleared on 32-bit platforms.

Signed-off-by: Divy Le Ray <divy@chelsio.com>
---

 drivers/net/cxgb3/cxgb3_main.c |   15 +++++++++++++++
 1 files changed, 15 insertions(+), 0 deletions(-)

diff --git a/drivers/net/cxgb3/cxgb3_main.c b/drivers/net/cxgb3/cxgb3_main.c
index 2c2aaa7..3f22da4 100644
--- a/drivers/net/cxgb3/cxgb3_main.c
+++ b/drivers/net/cxgb3/cxgb3_main.c
@@ -2984,6 +2984,20 @@ static void __devinit print_port_info(struct adapter *adap,
 	}
 }
 
+static void touch_bars(struct pci_dev *pdev)
+{
+#if BITS_PER_LONG < 64
+	u32 v;
+
+	pci_config_dword(pdev, PCI_BASE_ADDRESS_1, &v);
+	pci_write_config_dword(pdev, PCI_BASE_ADDRESS_1, v);
+	pci_read_config_dword(pdev, PCI_BASE_ADDRESS_3, &v);
+	pci_write_config_dword(pdev, PCI_BASE_ADDRESS_3, v);
+	pci_read_config_dword(pdev, PCI_BASE_ADDRESS_5, &v);
+	pci_write_config_dword(pdev, PCI_BASE_ADDRESS_5, v);
+#endif
+}
+
 static const struct net_device_ops cxgb_netdev_ops = {
 	.ndo_open		= cxgb_open,
 	.ndo_stop		= cxgb_close,
@@ -3051,6 +3065,7 @@ static int __devinit init_one(struct pci_dev *pdev,
 		goto out_disable_device;
 	}
 
+	touch_bars(pdev);
 	pci_set_master(pdev);
 	pci_save_state(pdev);
 

Re: [PATCH 2.6.30] cxgb3: clear shadow BAR registers

[David Miller]

From: Divy Le Ray <divy@chelsio.com>
Date: Tue, 31 Mar 2009 17:58:54 -0700

> From: Divy Le Ray <divy@chelsio.com>
> 
> Ensure that internal shadow BAR registers are cleared on 32-bit platforms.
> 
> Signed-off-by: Divy Le Ray <divy@chelsio.com>

Why is this a problem and why is it not possible to rely
on these being setup to zero by either the BIOS or the PCI
layer?

At best this is a PCI quirk and not something that belongs
in the driver.

I'm not applying this.

Re: [PATCH 2.6.30] cxgb3: clear shadow BAR registers

[Divy Le Ray]

On Tue, 31 Mar 2009 20:34:57 -0700, David Miller <davem@davemloft.net>  
wrote:

> From: Divy Le Ray <divy@chelsio.com>
> Date: Tue, 31 Mar 2009 17:58:54 -0700
>
>> From: Divy Le Ray <divy@chelsio.com>
>>
>> Ensure that internal shadow BAR registers are cleared on 32-bit  
>> platforms.
>>
>> Signed-off-by: Divy Le Ray <divy@chelsio.com>
>
> Why is this a problem and why is it not possible to rely
> on these being setup to zero by either the BIOS or the PCI
> layer?
>
> At best this is a PCI quirk and not something that belongs
> in the driver.
>
> I'm not applying this.

Hi Dave,

You are right, this issue is motherboard specific and seems to have been  
fixed a loong time ago.
Sorry for the spam.

Cheers,
Divy