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* [net-2.6 PATCH 1/5] e1000e: clear PHY wakeup bit after LCD reset on 82577/82578
@ 2009-10-26 21:22 Jeff Kirsher
  2009-10-26 21:23 ` [net-2.6 PATCH 2/5] e1000e: increase swflag acquisition timeout for ICHx/PCH Jeff Kirsher
                   ` (4 more replies)
  0 siblings, 5 replies; 10+ messages in thread
From: Jeff Kirsher @ 2009-10-26 21:22 UTC (permalink / raw)
  To: davem; +Cc: netdev, gospo, Bruce Allan, Jeff Kirsher

From: Bruce Allan <bruce.w.allan@intel.com>

Performing a dummy read of the PHY Wakeup Control (WUC) register clears the
wakeup enable bit set by an PHY reset.  If this bit remains set, link
problems may occur.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
---

 drivers/net/e1000e/ich8lan.c |   10 +++++++++-
 1 files changed, 9 insertions(+), 1 deletions(-)

diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c
index aa0ab0e..ead6651 100644
--- a/drivers/net/e1000e/ich8lan.c
+++ b/drivers/net/e1000e/ich8lan.c
@@ -844,7 +844,7 @@ static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw)
 	u32 i;
 	u32 data, cnf_size, cnf_base_addr, sw_cfg_mask;
 	s32 ret_val;
-	u16 word_addr, reg_data, reg_addr, phy_page = 0;
+	u16 reg, word_addr, reg_data, reg_addr, phy_page = 0;
 
 	ret_val = e1000e_phy_hw_reset_generic(hw);
 	if (ret_val)
@@ -859,6 +859,10 @@ static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw)
 			return ret_val;
 	}
 
+	/* Dummy read to clear the phy wakeup bit after lcd reset */
+	if (hw->mac.type == e1000_pchlan)
+		e1e_rphy(hw, BM_WUC, &reg);
+
 	/*
 	 * Initialize the PHY from the NVM on ICH platforms.  This
 	 * is needed due to an issue where the NVM configuration is
@@ -2229,6 +2233,7 @@ static s32 e1000_get_bus_info_ich8lan(struct e1000_hw *hw)
  **/
 static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
 {
+	u16 reg;
 	u32 ctrl, icr, kab;
 	s32 ret_val;
 
@@ -2304,6 +2309,9 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
 			hw_dbg(hw, "Auto Read Done did not complete\n");
 		}
 	}
+	/* Dummy read to clear the phy wakeup bit after lcd reset */
+	if (hw->mac.type == e1000_pchlan)
+		e1e_rphy(hw, BM_WUC, &reg);
 
 	/*
 	 * For PCH, this write will make sure that any noise


^ permalink raw reply related	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2009-10-26 23:17 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2009-10-26 21:22 [net-2.6 PATCH 1/5] e1000e: clear PHY wakeup bit after LCD reset on 82577/82578 Jeff Kirsher
2009-10-26 21:23 ` [net-2.6 PATCH 2/5] e1000e: increase swflag acquisition timeout for ICHx/PCH Jeff Kirsher
2009-10-26 23:17   ` David Miller
2009-10-26 21:23 ` [net-2.6 PATCH 3/5] e1000e: 82577/82578 requires a different method to configure LPLU Jeff Kirsher
2009-10-26 23:17   ` David Miller
2009-10-26 21:23 ` [net-2.6 PATCH 4/5] e1000e: separate mutex usage between NVM and PHY/CSR register for ICHx/PCH Jeff Kirsher
2009-10-26 23:17   ` David Miller
2009-10-26 21:24 ` [net-2.6 PATCH 5/5] e1000e: allow for swflag to be held over consecutive PHY accesses Jeff Kirsher
2009-10-26 23:17   ` David Miller
2009-10-26 23:17 ` [net-2.6 PATCH 1/5] e1000e: clear PHY wakeup bit after LCD reset on 82577/82578 David Miller

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