From: David Miller <davem@davemloft.net>
To: stefani@seibold.net
Cc: linux-kernel@vger.kernel.org, netdev@vger.kernel.org
Subject: Re: [PATCH] fix PHY polling system blocking
Date: Sat, 13 Mar 2010 12:12:48 -0800 (PST) [thread overview]
Message-ID: <20100313.121248.76758764.davem@davemloft.net> (raw)
In-Reply-To: <1268484790.6339.37.camel@wall-e>
From: Stefani Seibold <stefani@seibold.net>
Date: Sat, 13 Mar 2010 13:53:10 +0100
> For PHY chips without interrupts, the status of the ethernet will be
> polled every 2 sec. The poll function will read some register of the MII
> PHY. The time between the sending the MII_READ_COMMAND and receiving the
> result could be very long (>100us).
I'm not apply this, as I described in my previous email.
If it's expensive to detect link configuration changes that
doesn't mean you just turn it off.
next prev parent reply other threads:[~2010-03-13 20:12 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-03-13 12:53 [PATCH] fix PHY polling system blocking Stefani Seibold
2010-03-13 20:12 ` David Miller [this message]
-- strict thread matches above, loose matches on Subject: below --
2010-03-06 16:50 Stefani Seibold
2010-03-12 22:42 ` Andrew Morton
2010-03-13 11:54 ` Stefani Seibold
2010-03-13 20:10 ` David Miller
2010-03-21 21:54 ` Stefani Seibold
2010-03-22 0:56 ` David Miller
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