From: David Miller <davem@davemloft.net>
To: james.dutton@gmail.com
Cc: eric.dumazet@gmail.com, erblichs@earthlink.net, netdev@vger.kernel.org
Subject: Re: b44: Reset due to FIFO overflow.
Date: Wed, 30 Jun 2010 13:22:20 -0700 (PDT) [thread overview]
Message-ID: <20100630.132220.129754921.davem@davemloft.net> (raw)
In-Reply-To: <AANLkTimK4mGdsSq206aqfusXPvnQczbYDlOWSYXAbOQJ@mail.gmail.com>
From: James Courtier-Dutton <james.dutton@gmail.com>
Date: Mon, 28 Jun 2010 11:17:59 +0100
> Interesting, which hardware, apart from the b44, is it that "requires"
> a hardware reset after a RX FIFO overflow.
This problem is quite common, actually.
Even though it shouldn't be, this is seemingly one of the least tested
paths of a networking chip.
You'd think the recovery would be easy, flush the fifos and drop the
packet, then rewind the RX descriptor pointer.
But it's not and I've seen everything from RX descriptor corruption
to random DMA splats elsewhere corrupting memory entirely, as a result
of a networking card taking a RX fifo overflow.
next prev parent reply other threads:[~2010-06-30 20:22 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-06-28 7:41 b44: Reset due to FIFO overflow James Courtier-Dutton
2010-06-28 9:13 ` Eric Dumazet
2010-06-28 9:33 ` Mitchell Erblich
2010-06-28 10:00 ` Eric Dumazet
2010-06-28 10:17 ` James Courtier-Dutton
2010-06-28 11:09 ` Eric Dumazet
2010-06-28 21:21 ` Mitchell Erblich
2010-06-29 5:17 ` Eric Dumazet
2010-06-30 19:35 ` James Courtier-Dutton
2010-06-30 20:22 ` David Miller [this message]
2010-06-30 22:20 ` James Courtier-Dutton
2010-06-28 10:24 ` James Courtier-Dutton
2010-06-28 11:11 ` Eric Dumazet
2010-06-28 21:37 ` James Courtier-Dutton
2010-06-29 8:42 ` James Courtier-Dutton
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