From: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
To: davem@davemloft.net
Cc: netdev@vger.kernel.org, gospo@redhat.com, bphilips@novell.com,
Alexander Duyck <alexander.h.duyck@intel.com>,
Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Subject: [net-next-2.6 PATCH] e1000: allow option to limit number of descriptors down to 48 per ring
Date: Mon, 19 Jul 2010 16:43:47 -0700 [thread overview]
Message-ID: <20100719234219.13875.90302.stgit@localhost.localdomain> (raw)
From: Alexander Duyck <alexander.h.duyck@intel.com>
This change makes it possible to limit the number of descriptors down to 48
per ring. The reason for this change is to address a variation on hardware
errata 10 for 82546GB in which descriptors will be lost if more than 32
descriptors are fetched and the PCI-X MRBC is 512.
Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Tested-by: Emil Tantilov <emil.s.tantilov@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
---
drivers/net/e1000/e1000.h | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/e1000/e1000.h b/drivers/net/e1000/e1000.h
index 40b62b4..65298a6 100644
--- a/drivers/net/e1000/e1000.h
+++ b/drivers/net/e1000/e1000.h
@@ -86,12 +86,12 @@ struct e1000_adapter;
/* TX/RX descriptor defines */
#define E1000_DEFAULT_TXD 256
#define E1000_MAX_TXD 256
-#define E1000_MIN_TXD 80
+#define E1000_MIN_TXD 48
#define E1000_MAX_82544_TXD 4096
#define E1000_DEFAULT_RXD 256
#define E1000_MAX_RXD 256
-#define E1000_MIN_RXD 80
+#define E1000_MIN_RXD 48
#define E1000_MAX_82544_RXD 4096
#define E1000_MIN_ITR_USECS 10 /* 100000 irq/sec */
next reply other threads:[~2010-07-19 23:44 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-07-19 23:43 Jeff Kirsher [this message]
2010-07-20 3:24 ` [net-next-2.6 PATCH] e1000: allow option to limit number of descriptors down to 48 per ring David Miller
2010-07-20 4:40 ` Eric Dumazet
2010-07-20 17:12 ` Brandeburg, Jesse
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