From: David Miller <davem@davemloft.net>
To: jeffrey.t.kirsher@intel.com
Cc: netdev@vger.kernel.org, gospo@redhat.com, bphilips@novell.com,
bruce.w.allan@intel.com
Subject: Re: [net-next-2.6 PATCH] e1000e: correct MAC-PHY interconnect register offset for 82579
Date: Tue, 03 Aug 2010 16:41:10 -0700 (PDT) [thread overview]
Message-ID: <20100803.164110.112582904.davem@davemloft.net> (raw)
In-Reply-To: <20100803214827.5712.8674.stgit@localhost.localdomain>
From: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Date: Tue, 03 Aug 2010 14:48:35 -0700
> From: Bruce Allan <bruce.w.allan@intel.com>
>
> The MAC-PHY interconnect register set on ICH/PCH parts is accessed through
> a peephole mechanism by writing an offset to a CSR register. The offset
> for the interconnect's half-duplex control register (which is used in a
> jumbo frame workaround for 82579) is incorrect.
>
> Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com>
> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Applied.
prev parent reply other threads:[~2010-08-03 23:40 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-08-03 21:48 [net-next-2.6 PATCH] e1000e: correct MAC-PHY interconnect register offset for 82579 Jeff Kirsher
2010-08-03 23:41 ` David Miller [this message]
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