Re: alchemy/gpr: au1000_eth regression with v2.6.37rc2

[Florian Fainelli <florian@openwrt.org>]

Hello Wolfgang,

On Friday 19 November 2010 11:29:45 Wolfgang Grandegger wrote:
> Hello Florian,
> 
> On 11/18/2010 11:30 PM, Florian Fainelli wrote:
> > Hello Wolfgang,
> > 
> > Le Thursday 18 November 2010 20:59:15, Wolfgang Grandegger a écrit :
> >> Hello,
> >> 
> >> I just realized that the v2.6.37-rc2 kernel does not boot any more on
> >> the Alchemy GPR board. It works fine with v2.6.36. It hangs in the
> >> probe function of the au1000_eth driver when probing the second
> >> 
> >> ethernet port (eth1):
> >>   au1000_eth_mii: probed
> >>   au1000-eth au1000-eth.0: (unregistered net_device): attached PHY
> >>   driver
> >> 
> >> [Generic PHY] (mii_bus:phy_addr=0:00, irq=-1) au1000-eth au1000-eth.0:
> >> eth0: Au1xx0 Ethernet found at 0x10500000, irq 35 au1000_eth: au1000_eth
> >> version 1.7 Pete Popov <ppopov@embeddedalley.com> ... hangs ...
> >> 
> >> Similar messages should follow for eth1. I narrowed down (bisect'ed) the
> >> 
> >> problem to commit:
> >>   commit d0e7cb5d401695809ba8c980124ab1d8c66efc8b
> >>   Author: Florian Fainelli <florian@openwrt.org>
> >>   Date:   Wed Sep 8 11:15:13 2010 +0000
> >>   
> >>     au1000-eth: remove volatiles, switch to I/O accessors
> >>     
> >>     Remove all the volatile keywords where they were used, switch to
> >>     using
> >> 
> >> the proper readl/writel accessors.
> >> 
> >>     Signed-off-by: Florian Fainelli <florian@openwrt.org>
> >>     Signed-off-by: David S. Miller <davem@davemloft.net>
> >> 
> >> The kernel actually hangs when accessing "&aup->mac->mii_control" in
> >> au1000_mdio_read(), but only for eth1. Any idea what does go wrong?
> > 
> > I do not understand so far while it hangs only for eth1. My device only
> > has one ethernet MAC, so I could not notice the problem. Looking at this
> > close, there are a couple of u32 const* usages in
> > au1000_mdio_{read,write} which are looking wrong to me now. Can you try
> > to remove these?
> 
> That did not help.

I suspected it, but thanks for the confirmation.

> 
> >> In principle, I do not want to access the MII regs of the MAC because
> >> eth0 and eth1 are connected to switches. But that's not possible, even
> >> with "aup->phy_static_config=1" and "aup->phy_addr=0".
> > 
> > If you think this is another issue, I will fix it in another patch.
> 
> Accessing the MII registers of the MAC should not hang the system even
> if I do not need to. First I want to  understand why. Looks like a wired
> optimizer issue.

I definitively agree, furthermore since there is a timeout for read and write 
operations. I will look at the assembly and see if I can see anything 
different.

> 
> BTW: why do you use readl() and writel() instead of the usual au_readl()
> and au_writel() to access memory mapped cpu registers? It did not help,
> anyway.

This is just because they are generic accessors, and the au_{readl,writel} 
variants were not different.
--
Florian