From: Arthur Jones <arthur.jones@riverbed.com>
To: "Allan, Bruce W" <bruce.w.allan@intel.com>
Cc: Ben Hutchings <bhutchings@solarflare.com>,
"Kirsher, Jeffrey T" <jeffrey.t.kirsher@intel.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>
Subject: Re: [PATCH] e1000e: workaround missing power down mii control bit on 82571
Date: Mon, 20 Dec 2010 07:33:01 -0800 [thread overview]
Message-ID: <20101220153301.GV18990@ajones-laptop.nbttech.com> (raw)
In-Reply-To: <8DD2590731AB5D4C9DBF71A877482A9001773F7BFC@orsmsx509.amr.corp.intel.com>
Hi Bruce, ...
On Fri, Dec 17, 2010 at 07:53:08AM -0800, Allan, Bruce W wrote:
> >-----Original Message-----
> >From: netdev-owner@vger.kernel.org [mailto:netdev-owner@vger.kernel.org] On
> >Behalf Of Arthur Jones
> >Sent: Friday, December 17, 2010 6:05 AM
> >To: Allan, Bruce W
> >Cc: Ben Hutchings; Kirsher, Jeffrey T; netdev@vger.kernel.org
> >Subject: Re: [PATCH] e1000e: workaround missing power down mii control bit on
> >82571
> >
> >That's not what I saw. I saw the bit always
> >read back zero, even right after I set it.
> >
> >Have you tried writing the power down bit and
> >reading it back?
> >
> >Arthur
>
> Yes, and it worked as expected.
Interesting! So then you're not able to
repro the issue that I describe in the
patch then either?
This was an 82571? Can you send along
the firmware revision and the full lspci
for the NIC where it works to read back
the power down bit? Very strange...
Arthur
next prev parent reply other threads:[~2010-12-20 15:33 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-12-16 18:28 [PATCH] e1000e: workaround missing power down mii control bit on 82571 Arthur Jones
2010-12-16 18:56 ` Ben Hutchings
2010-12-16 19:04 ` Allan, Bruce W
2010-12-16 19:28 ` Allan, Bruce W
2010-12-16 20:04 ` Arthur Jones
2010-12-16 22:14 ` Arthur Jones
2010-12-17 1:46 ` Allan, Bruce W
2010-12-17 14:04 ` Arthur Jones
2010-12-17 15:53 ` Allan, Bruce W
2010-12-20 15:33 ` Arthur Jones [this message]
2010-12-22 20:25 ` Allan, Bruce W
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