From: Hiroaki SHIMODA <shimoda.hiroaki@gmail.com>
To: Eric Dumazet <eric.dumazet@gmail.com>
Cc: Tom Herbert <therbert@google.com>,
Denys Fedoryshchenko <denys@visp.net.lb>,
netdev@vger.kernel.org, e1000-devel@lists.sourceforge.net,
jeffrey.t.kirsher@intel.com, jesse.brandeburg@intel.com,
davem@davemloft.net
Subject: Re: Strange latency spikes/TX network stalls on Sun Fire X4150(x86) and e1000e
Date: Wed, 6 Jun 2012 17:43:03 +0900 [thread overview]
Message-ID: <20120606174303.0bfc9868.shimoda.hiroaki@gmail.com> (raw)
In-Reply-To: <1338959413.2760.3686.camel@edumazet-glaptop>
On Wed, 06 Jun 2012 07:10:13 +0200
Eric Dumazet <eric.dumazet@gmail.com> wrote:
> On Tue, 2012-05-29 at 23:25 +0900, Hiroaki SHIMODA wrote:
>
> > If I understand the code and spec correctly, TX interrupts are
> > generated when TXDCTL.WTHRESH descriptors have been accumulated
> > and write backed.
> >
> > I tentatively changed the TXDCTL.WTHRESH to 1, then it seems
> > that latency spikes are disappear.
> >
> > drivers/net/ethernet/intel/e1000e/e1000.h
> > @@ -181,7 +181,7 @@ struct e1000_info;
> > #define E1000_TXDCTL_DMA_BURST_ENABLE \
> > (E1000_TXDCTL_GRAN | /* set descriptor granularity */ \
> > E1000_TXDCTL_COUNT_DESC | \
> > - (5 << 16) | /* wthresh must be +1 more than desired */\
> > + (1 << 16) | /* wthresh must be +1 more than desired */\
> > (1 << 8) | /* hthresh */ \
> > 0x1f) /* pthresh */
> >
>
>
> Was this patch officially submitted ?
>
> Thanks !
Sorry for long delay. I'll post.
(I have no idea how to fix this problem as keeping TXDCTL.WTHRESH to 5)
next prev parent reply other threads:[~2012-06-06 8:43 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-15 14:15 Strange latency spikes/TX network stalls on Sun Fire X4150(x86) and e1000e Denys Fedoryshchenko
2012-05-17 13:42 ` Denys Fedoryshchenko
2012-05-17 16:54 ` Denys Fedoryshchenko
2012-05-18 14:04 ` Denys Fedoryshchenko
2012-05-19 2:07 ` Tom Herbert
2012-05-19 2:29 ` Denys Fedoryshchenko
2012-05-19 2:40 ` Denys Fedoryshchenko
2012-05-20 17:40 ` Tom Herbert
2012-05-20 18:53 ` Denys Fedoryshchenko
2012-05-20 19:07 ` Eric Dumazet
2012-05-20 19:18 ` Denys Fedoryshchenko
2012-05-21 3:56 ` Eric Dumazet
2012-05-21 8:06 ` Denys Fedoryshchenko
2012-05-21 8:30 ` Eric Dumazet
2012-05-21 8:40 ` Eric Dumazet
2012-05-21 9:22 ` Denys Fedoryshchenko
2012-05-22 17:11 ` Denys Fedoryshchenko
2012-05-22 17:24 ` Eric Dumazet
2012-05-25 6:01 ` Tom Herbert
2012-05-25 6:22 ` Eric Dumazet
2012-05-25 16:59 ` Tom Herbert
2012-05-25 17:18 ` Eric Dumazet
2012-05-29 14:25 ` Hiroaki SHIMODA
2012-05-29 14:54 ` Tom Herbert
2012-05-29 15:11 ` Eric Dumazet
2012-05-29 19:52 ` Denys Fedoryshchenko
2012-05-30 0:06 ` Hiroaki SHIMODA
2012-05-30 8:40 ` Eric Dumazet
2012-05-30 10:43 ` Hiroaki SHIMODA
2012-05-30 11:08 ` Eric Dumazet
2012-05-30 11:20 ` Joe Perches
2012-05-30 11:59 ` Eric Dumazet
2012-05-30 14:09 ` Joe Perches
2012-05-30 14:42 ` Eric Dumazet
2012-05-30 14:50 ` Joe Perches
2012-05-30 11:29 ` Hiroaki SHIMODA
2012-05-30 14:49 ` Eric Dumazet
2012-05-30 15:00 ` dave taht
2012-05-30 22:19 ` Hiroaki SHIMODA
2012-05-30 10:52 ` David Laight
2012-05-30 11:04 ` Eric Dumazet
2012-05-30 11:12 ` Eric Dumazet
2012-06-06 5:10 ` Eric Dumazet
2012-06-06 8:43 ` Hiroaki SHIMODA [this message]
2012-06-06 16:26 ` Jesse Brandeburg
2012-06-06 17:05 ` Eric Dumazet
2012-06-06 17:26 ` David Miller
2012-06-06 17:19 ` Hiroaki SHIMODA
2012-06-06 18:21 ` Tom Herbert
2012-06-06 18:23 ` David Miller
2012-06-06 18:46 ` Stephen Hemminger
2012-05-20 18:13 ` Eric Dumazet
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