Re: [PATCH v2 RESEND 3/6] net: calxedaxgmac: use relaxed i/o accessors in rx and tx paths

[David Miller <davem@davemloft.net>]

From: Rob Herring <robherring2@gmail.com>
Date: Thu,  1 Nov 2012 05:41:01 -0500

> From: Rob Herring <rob.herring@calxeda.com>
> 
> The standard readl/writel accessors involve a spinlock and cache sync
> operation on ARM platforms with an outer cache. Only DMA triggering
> accesses need this, so use the relaxed variants instead.
> 
> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> ---
>  drivers/net/ethernet/calxeda/Kconfig |    2 +-
>  drivers/net/ethernet/calxeda/xgmac.c |   12 ++++++------
>  2 files changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/net/ethernet/calxeda/Kconfig b/drivers/net/ethernet/calxeda/Kconfig
> index aba435c..6a4ddf6 100644
> --- a/drivers/net/ethernet/calxeda/Kconfig
> +++ b/drivers/net/ethernet/calxeda/Kconfig
> @@ -1,6 +1,6 @@
>  config NET_CALXEDA_XGMAC
>  	tristate "Calxeda 1G/10G XGMAC Ethernet driver"
> -	depends on HAS_IOMEM
> +	depends on HAS_IOMEM && ARM
>  	select CRC32
>  	help
>  	  This is the driver for the XGMAC Ethernet IP block found on Calxeda

This is a regression.  Now I can't built test this driver on x86
or sparc.

I'm not applying this series.  You can argue until the cows come home
about why you absolutley have to add this restriction, but I simply
don't care, this issue is too important to me.