* [PATCH] Prevent interrupt loop with DWMAC MMC RX IPC Counter
@ 2013-02-15 13:15 Christian Ruppert
2013-02-15 13:46 ` Giuseppe CAVALLARO
0 siblings, 1 reply; 8+ messages in thread
From: Christian Ruppert @ 2013-02-15 13:15 UTC (permalink / raw)
To: Giuseppe Cavallaro; +Cc: netdev, linux-kernel, Vineet Gupta, Christian Ruppert
If the DesignWare MAC is synthesised with MMC RX IPC Counter, an unmanaged
and unacknowledged interrupt is generated after some time of operation. To
my knowledge there is no way to autodetect this configuration.
This patch adds a Kconfig option to tell the driver about the counter which
in turn masks the undesired interrupts.
Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
---
drivers/net/ethernet/stmicro/stmmac/Kconfig | 8 ++++++++
drivers/net/ethernet/stmicro/stmmac/mmc_core.c | 3 +++
2 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index 1164930..60e5130 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -71,5 +71,13 @@ config STMMAC_CHAINED
endchoice
+config STMMAC_RX_IPC_CTRS
+ bool "MMC Receive IPC Counters enabled"
+ depends on STMMAC_ETH
+ default n
+ ---help---
+ Select this option in case MMC Receive IPC counters were enabled at
+ synthesis time of the block. If this option is not set correctly,
+ system might hang after a certain amount of time.
endif
diff --git a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
index 0c74a70..ae877ee 100644
--- a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
@@ -149,6 +149,9 @@ void dwmac_mmc_intr_all_mask(void __iomem *ioaddr)
{
writel(MMC_DEFAULT_MASK, ioaddr + MMC_RX_INTR_MASK);
writel(MMC_DEFAULT_MASK, ioaddr + MMC_TX_INTR_MASK);
+#ifdef CONFIG_STMMAC_RX_IPC_CTRS
+ writel(MMC_DEFAULT_MASK, ioaddr + MMC_RX_IPC_INTR_MASK);
+#endif
}
/* This reads the MAC core counters (if actaully supported).
--
1.7.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH] Prevent interrupt loop with DWMAC MMC RX IPC Counter
2013-02-15 13:15 [PATCH] Prevent interrupt loop with DWMAC MMC RX IPC Counter Christian Ruppert
@ 2013-02-15 13:46 ` Giuseppe CAVALLARO
2013-02-15 14:48 ` Christian Ruppert
0 siblings, 1 reply; 8+ messages in thread
From: Giuseppe CAVALLARO @ 2013-02-15 13:46 UTC (permalink / raw)
To: Christian Ruppert; +Cc: netdev, linux-kernel, Vineet Gupta
Hello Christian
On 2/15/2013 2:15 PM, Christian Ruppert wrote:
> If the DesignWare MAC is synthesised with MMC RX IPC Counter, an unmanaged
> and unacknowledged interrupt is generated after some time of operation. To
> my knowledge there is no way to autodetect this configuration.
>
> This patch adds a Kconfig option to tell the driver about the counter which
> in turn masks the undesired interrupts.
>
> Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
> ---
> drivers/net/ethernet/stmicro/stmmac/Kconfig | 8 ++++++++
> drivers/net/ethernet/stmicro/stmmac/mmc_core.c | 3 +++
> 2 files changed, 11 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> index 1164930..60e5130 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> @@ -71,5 +71,13 @@ config STMMAC_CHAINED
>
> endchoice
>
> +config STMMAC_RX_IPC_CTRS
> + bool "MMC Receive IPC Counters enabled"
> + depends on STMMAC_ETH
> + default n
> + ---help---
> + Select this option in case MMC Receive IPC counters were enabled at
> + synthesis time of the block. If this option is not set correctly,
> + system might hang after a certain amount of time.
>
> endif
> diff --git a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
> index 0c74a70..ae877ee 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
> @@ -149,6 +149,9 @@ void dwmac_mmc_intr_all_mask(void __iomem *ioaddr)
> {
> writel(MMC_DEFAULT_MASK, ioaddr + MMC_RX_INTR_MASK);
> writel(MMC_DEFAULT_MASK, ioaddr + MMC_TX_INTR_MASK);
> +#ifdef CONFIG_STMMAC_RX_IPC_CTRS
> + writel(MMC_DEFAULT_MASK, ioaddr + MMC_RX_IPC_INTR_MASK);
> +#endif
your fix makes sense to me; I have never faced this problem because the
MMC RX IPC Counter is not synthesised on the GMAC chip I used.
Anyway all mmc interrupts are not managed by defsign so I only ask you
to remove the Kconfig option and add the writel in the
dwmac_mmc_intr_all_mask.
peppe
> }
>
> /* This reads the MAC core counters (if actaully supported).
>
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH] Prevent interrupt loop with DWMAC MMC RX IPC Counter
2013-02-15 13:46 ` Giuseppe CAVALLARO
@ 2013-02-15 14:48 ` Christian Ruppert
2013-02-15 14:58 ` [PATCH v2] " Christian Ruppert
2013-02-15 15:17 ` [PATCH] Prevent interrupt loop with DWMAC " Giuseppe CAVALLARO
0 siblings, 2 replies; 8+ messages in thread
From: Christian Ruppert @ 2013-02-15 14:48 UTC (permalink / raw)
To: Giuseppe CAVALLARO; +Cc: netdev, linux-kernel, Vineet Gupta
Hello Guiseppe,
Thanks for the feedback. I'll send a new patch shortly which
unconditionally masks the interrupts as you suggest. The mask register
does not exist in DWMACs without RX IPC counters, however, and I have no
way of testing if accessing this register nevertheless generates a bus
error. Do you have hardware to verify if everything works fine even
without RX IPC counters before integrating the patch?
Greetings,
Christian
On Fri, Feb 15, 2013 at 02:46:16PM +0100, Giuseppe CAVALLARO wrote:
> Hello Christian
>
> On 2/15/2013 2:15 PM, Christian Ruppert wrote:
> >If the DesignWare MAC is synthesised with MMC RX IPC Counter, an unmanaged
> >and unacknowledged interrupt is generated after some time of operation. To
> >my knowledge there is no way to autodetect this configuration.
> >
> >This patch adds a Kconfig option to tell the driver about the counter which
> >in turn masks the undesired interrupts.
> >
> >Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
> >---
> > drivers/net/ethernet/stmicro/stmmac/Kconfig | 8 ++++++++
> > drivers/net/ethernet/stmicro/stmmac/mmc_core.c | 3 +++
> > 2 files changed, 11 insertions(+), 0 deletions(-)
> >
> >diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> >index 1164930..60e5130 100644
> >--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
> >+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> >@@ -71,5 +71,13 @@ config STMMAC_CHAINED
> >
> > endchoice
> >
> >+config STMMAC_RX_IPC_CTRS
> >+ bool "MMC Receive IPC Counters enabled"
> >+ depends on STMMAC_ETH
> >+ default n
> >+ ---help---
> >+ Select this option in case MMC Receive IPC counters were enabled at
> >+ synthesis time of the block. If this option is not set correctly,
> >+ system might hang after a certain amount of time.
> >
> > endif
> >diff --git a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
> >index 0c74a70..ae877ee 100644
> >--- a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
> >+++ b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
> >@@ -149,6 +149,9 @@ void dwmac_mmc_intr_all_mask(void __iomem *ioaddr)
> > {
> > writel(MMC_DEFAULT_MASK, ioaddr + MMC_RX_INTR_MASK);
> > writel(MMC_DEFAULT_MASK, ioaddr + MMC_TX_INTR_MASK);
> >+#ifdef CONFIG_STMMAC_RX_IPC_CTRS
> >+ writel(MMC_DEFAULT_MASK, ioaddr + MMC_RX_IPC_INTR_MASK);
> >+#endif
>
> your fix makes sense to me; I have never faced this problem because the
> MMC RX IPC Counter is not synthesised on the GMAC chip I used.
>
> Anyway all mmc interrupts are not managed by defsign so I only ask
> you to remove the Kconfig option and add the writel in the
> dwmac_mmc_intr_all_mask.
>
> peppe
>
> > }
> >
> > /* This reads the MAC core counters (if actaully supported).
> >
>
--
Christian Ruppert , <christian.ruppert@abilis.com>
/|
Tel: +41/(0)22 816 19-42 //| 3, Chemin du Pré-Fleuri
_// | bilis Systems CH-1228 Plan-les-Ouates
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH v2] Prevent interrupt loop with DWMAC MMC RX IPC Counter
2013-02-15 14:48 ` Christian Ruppert
@ 2013-02-15 14:58 ` Christian Ruppert
2013-02-15 15:18 ` Giuseppe CAVALLARO
2013-02-15 15:17 ` [PATCH] Prevent interrupt loop with DWMAC " Giuseppe CAVALLARO
1 sibling, 1 reply; 8+ messages in thread
From: Christian Ruppert @ 2013-02-15 14:58 UTC (permalink / raw)
To: Giuseppe CAVALLARO; +Cc: netdev, linux-kernel, Vineet Gupta, Christian Ruppert
If the DesignWare MAC is synthesised with MMC RX IPC Counter, an unmanaged
and unacknowledged interrupt is generated after some time of operation.
This patch masks the undesired interrupts.
Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
---
drivers/net/ethernet/stmicro/stmmac/mmc_core.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
index 0c74a70..50617c5 100644
--- a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
@@ -149,6 +149,7 @@ void dwmac_mmc_intr_all_mask(void __iomem *ioaddr)
{
writel(MMC_DEFAULT_MASK, ioaddr + MMC_RX_INTR_MASK);
writel(MMC_DEFAULT_MASK, ioaddr + MMC_TX_INTR_MASK);
+ writel(MMC_DEFAULT_MASK, ioaddr + MMC_RX_IPC_INTR_MASK);
}
/* This reads the MAC core counters (if actaully supported).
--
1.7.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v2] Prevent interrupt loop with DWMAC MMC RX IPC Counter
2013-02-15 14:58 ` [PATCH v2] " Christian Ruppert
@ 2013-02-15 15:18 ` Giuseppe CAVALLARO
2013-04-10 7:56 ` [PATCH] stmmac: prevent interrupt loop with " Christian Ruppert
0 siblings, 1 reply; 8+ messages in thread
From: Giuseppe CAVALLARO @ 2013-02-15 15:18 UTC (permalink / raw)
To: Christian Ruppert; +Cc: netdev, linux-kernel, Vineet Gupta
On 2/15/2013 3:58 PM, Christian Ruppert wrote:
> If the DesignWare MAC is synthesised with MMC RX IPC Counter, an unmanaged
> and unacknowledged interrupt is generated after some time of operation.
>
> This patch masks the undesired interrupts.
>
> Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
> ---
> drivers/net/ethernet/stmicro/stmmac/mmc_core.c | 1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
> index 0c74a70..50617c5 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
> @@ -149,6 +149,7 @@ void dwmac_mmc_intr_all_mask(void __iomem *ioaddr)
> {
> writel(MMC_DEFAULT_MASK, ioaddr + MMC_RX_INTR_MASK);
> writel(MMC_DEFAULT_MASK, ioaddr + MMC_TX_INTR_MASK);
> + writel(MMC_DEFAULT_MASK, ioaddr + MMC_RX_IPC_INTR_MASK);
> }
>
> /* This reads the MAC core counters (if actaully supported).
>
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH] stmmac: prevent interrupt loop with MMC RX IPC Counter
2013-02-15 15:18 ` Giuseppe CAVALLARO
@ 2013-04-10 7:56 ` Christian Ruppert
2013-04-11 20:03 ` David Miller
0 siblings, 1 reply; 8+ messages in thread
From: Christian Ruppert @ 2013-04-10 7:56 UTC (permalink / raw)
To: netdev; +Cc: Giuseppe Cavallaro, Christian Ruppert
If the DesignWare MAC is synthesised with MMC RX IPC Counter, an unmanaged
and unacknowledged interrupt is generated after some time of operation.
This patch masks the undesired interrupts.
Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
---
drivers/net/ethernet/stmicro/stmmac/mmc_core.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
index 0c74a70..50617c5 100644
--- a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
@@ -149,6 +149,7 @@ void dwmac_mmc_intr_all_mask(void __iomem *ioaddr)
{
writel(MMC_DEFAULT_MASK, ioaddr + MMC_RX_INTR_MASK);
writel(MMC_DEFAULT_MASK, ioaddr + MMC_TX_INTR_MASK);
+ writel(MMC_DEFAULT_MASK, ioaddr + MMC_RX_IPC_INTR_MASK);
}
/* This reads the MAC core counters (if actaully supported).
--
1.7.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH] stmmac: prevent interrupt loop with MMC RX IPC Counter
2013-04-10 7:56 ` [PATCH] stmmac: prevent interrupt loop with " Christian Ruppert
@ 2013-04-11 20:03 ` David Miller
0 siblings, 0 replies; 8+ messages in thread
From: David Miller @ 2013-04-11 20:03 UTC (permalink / raw)
To: christian.ruppert; +Cc: netdev, peppe.cavallaro
From: Christian Ruppert <christian.ruppert@abilis.com>
Date: Wed, 10 Apr 2013 09:56:04 +0200
> If the DesignWare MAC is synthesised with MMC RX IPC Counter, an unmanaged
> and unacknowledged interrupt is generated after some time of operation.
>
> This patch masks the undesired interrupts.
>
> Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
> Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Applied.
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] Prevent interrupt loop with DWMAC MMC RX IPC Counter
2013-02-15 14:48 ` Christian Ruppert
2013-02-15 14:58 ` [PATCH v2] " Christian Ruppert
@ 2013-02-15 15:17 ` Giuseppe CAVALLARO
1 sibling, 0 replies; 8+ messages in thread
From: Giuseppe CAVALLARO @ 2013-02-15 15:17 UTC (permalink / raw)
To: Christian Ruppert; +Cc: netdev, linux-kernel, Vineet Gupta
On 2/15/2013 3:48 PM, Christian Ruppert wrote:
> Hello Guiseppe,
>
> Thanks for the feedback. I'll send a new patch shortly which
> unconditionally masks the interrupts as you suggest. The mask register
> does not exist in DWMACs without RX IPC counters, however, and I have no
> way of testing if accessing this register nevertheless generates a bus
> error. Do you have hardware to verify if everything works fine even
> without RX IPC counters before integrating the patch?
Tests done on two boards and no issue on my side
peppe
>
> Greetings,
> Christian
>
> On Fri, Feb 15, 2013 at 02:46:16PM +0100, Giuseppe CAVALLARO wrote:
>> Hello Christian
>>
>> On 2/15/2013 2:15 PM, Christian Ruppert wrote:
>>> If the DesignWare MAC is synthesised with MMC RX IPC Counter, an unmanaged
>>> and unacknowledged interrupt is generated after some time of operation. To
>>> my knowledge there is no way to autodetect this configuration.
>>>
>>> This patch adds a Kconfig option to tell the driver about the counter which
>>> in turn masks the undesired interrupts.
>>>
>>> Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
>>> ---
>>> drivers/net/ethernet/stmicro/stmmac/Kconfig | 8 ++++++++
>>> drivers/net/ethernet/stmicro/stmmac/mmc_core.c | 3 +++
>>> 2 files changed, 11 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>>> index 1164930..60e5130 100644
>>> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
>>> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>>> @@ -71,5 +71,13 @@ config STMMAC_CHAINED
>>>
>>> endchoice
>>>
>>> +config STMMAC_RX_IPC_CTRS
>>> + bool "MMC Receive IPC Counters enabled"
>>> + depends on STMMAC_ETH
>>> + default n
>>> + ---help---
>>> + Select this option in case MMC Receive IPC counters were enabled at
>>> + synthesis time of the block. If this option is not set correctly,
>>> + system might hang after a certain amount of time.
>>>
>>> endif
>>> diff --git a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
>>> index 0c74a70..ae877ee 100644
>>> --- a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
>>> +++ b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
>>> @@ -149,6 +149,9 @@ void dwmac_mmc_intr_all_mask(void __iomem *ioaddr)
>>> {
>>> writel(MMC_DEFAULT_MASK, ioaddr + MMC_RX_INTR_MASK);
>>> writel(MMC_DEFAULT_MASK, ioaddr + MMC_TX_INTR_MASK);
>>> +#ifdef CONFIG_STMMAC_RX_IPC_CTRS
>>> + writel(MMC_DEFAULT_MASK, ioaddr + MMC_RX_IPC_INTR_MASK);
>>> +#endif
>>
>> your fix makes sense to me; I have never faced this problem because the
>> MMC RX IPC Counter is not synthesised on the GMAC chip I used.
>>
>> Anyway all mmc interrupts are not managed by defsign so I only ask
>> you to remove the Kconfig option and add the writel in the
>> dwmac_mmc_intr_all_mask.
>>
>> peppe
>>
>>> }
>>>
>>> /* This reads the MAC core counters (if actaully supported).
>>>
>>
>
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2013-04-11 20:03 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-02-15 13:15 [PATCH] Prevent interrupt loop with DWMAC MMC RX IPC Counter Christian Ruppert
2013-02-15 13:46 ` Giuseppe CAVALLARO
2013-02-15 14:48 ` Christian Ruppert
2013-02-15 14:58 ` [PATCH v2] " Christian Ruppert
2013-02-15 15:18 ` Giuseppe CAVALLARO
2013-04-10 7:56 ` [PATCH] stmmac: prevent interrupt loop with " Christian Ruppert
2013-04-11 20:03 ` David Miller
2013-02-15 15:17 ` [PATCH] Prevent interrupt loop with DWMAC " Giuseppe CAVALLARO
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).