* Re: MIPS: Add MSI support for XLP9XX
[not found] <20140610013104.DF5A8660F61@gitolite.kernel.org>
@ 2014-06-18 0:18 ` Dave Jones
2014-06-18 9:00 ` David Laight
0 siblings, 1 reply; 2+ messages in thread
From: Dave Jones @ 2014-06-18 0:18 UTC (permalink / raw)
To: Linux Kernel Mailing List; +Cc: netdev, ganesanr
On Tue, Jun 10, 2014 at 01:31:04AM +0000, Linux Kernel wrote:
> Gitweb: http://git.kernel.org/linus/;a=commit;h=d66f3f0e10b49df8d0cc0d8eb5bf2ef9863a33cf
> Commit: d66f3f0e10b49df8d0cc0d8eb5bf2ef9863a33cf
> Parent: 1c98398662c9b4e2f03f64344f83dd6cb14e0420
> Refname: refs/heads/master
> Author: Ganesan Ramalingam <ganesanr@broadcom.com>
> AuthorDate: Fri May 9 16:35:49 2014 +0530
> Committer: Ralf Baechle <ralf@linux-mips.org>
> CommitDate: Fri May 30 16:51:02 2014 +0200
>
> MIPS: Add MSI support for XLP9XX
...
> + if (cpu_is_xlp9xx()) {
> + val = ((node * nlm_threads_per_node()) << 7 |
> + PIC_PCIE_MSIX_IRQ(link) << 1 | 0 << 0);
Should this be..
val = ((node * nlm_threads_per_node()) << 7 |
PIC_PCIE_MSIX_IRQ(link) << 1);
val &= ~(1 << 0);
perhaps ? because shifting a zero is a nop, as is ORing it.
Dave
^ permalink raw reply [flat|nested] 2+ messages in thread* RE: MIPS: Add MSI support for XLP9XX
2014-06-18 0:18 ` MIPS: Add MSI support for XLP9XX Dave Jones
@ 2014-06-18 9:00 ` David Laight
0 siblings, 0 replies; 2+ messages in thread
From: David Laight @ 2014-06-18 9:00 UTC (permalink / raw)
To: 'Dave Jones', Linux Kernel Mailing List
Cc: netdev@vger.kernel.org, ganesanr@broadcom.com
From: Dave Jones
> On Tue, Jun 10, 2014 at 01:31:04AM +0000, Linux Kernel wrote:
> > Gitweb: http://git.kernel.org/linus/;a=commit;h=d66f3f0e10b49df8d0cc0d8eb5bf2ef9863a33cf
> > Commit: d66f3f0e10b49df8d0cc0d8eb5bf2ef9863a33cf
> > Parent: 1c98398662c9b4e2f03f64344f83dd6cb14e0420
> > Refname: refs/heads/master
> > Author: Ganesan Ramalingam <ganesanr@broadcom.com>
> > AuthorDate: Fri May 9 16:35:49 2014 +0530
> > Committer: Ralf Baechle <ralf@linux-mips.org>
> > CommitDate: Fri May 30 16:51:02 2014 +0200
> >
> > MIPS: Add MSI support for XLP9XX
>
> ...
>
> > + if (cpu_is_xlp9xx()) {
> > + val = ((node * nlm_threads_per_node()) << 7 |
> > + PIC_PCIE_MSIX_IRQ(link) << 1 | 0 << 0);
>
> Should this be..
>
> val = ((node * nlm_threads_per_node()) << 7 |
> PIC_PCIE_MSIX_IRQ(link) << 1);
> val &= ~(1 << 0);
>
> perhaps ? because shifting a zero is a nop, as is ORing it.
Unlikely, it looks to me as though it is just being explicit that the
low bit of the compound word (whatever it is) is zero.
David
^ permalink raw reply [flat|nested] 2+ messages in thread
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2014-06-18 0:18 ` MIPS: Add MSI support for XLP9XX Dave Jones
2014-06-18 9:00 ` David Laight
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