From: David Miller <davem@davemloft.net>
To: Frank.Li@freescale.com
Cc: b38611@freescale.com, netdev@vger.kernel.org, lznuaa@gmail.com,
shawn.guo@linaro.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [Patch net-next v2 2/4] net: fec: add interrupt coalescence feature support
Date: Tue, 16 Sep 2014 16:45:23 -0400 (EDT) [thread overview]
Message-ID: <20140916.164523.1376753359151264152.davem@davemloft.net> (raw)
In-Reply-To: <1410890290-11248-3-git-send-email-Frank.Li@freescale.com>
From: <Frank.Li@freescale.com>
Date: Wed, 17 Sep 2014 01:58:08 +0800
> +/* ENET interrupt coalescing macro define */
> +#define FEC_ITR_CLK_SEL (0x1 << 30)
> +#define FEC_ITR_EN (0x1 << 31)
> +#define FEC_ITR_ICFT(X) ((X & 0xFF) << 20)
> +#define FEC_ITR_ICTT(X) ((X) & 0xFFFF)
> +#define FEC_ITR_ICFT_DEFAULT 200 /* Set 200 frame count threshold */
> +#define FEC_ITR_ICTT_DEFAULT 1000 /* Set 1000us timer threshold */
...
> +static int
> +fec_enet_set_coalesce(struct net_device *ndev, struct ethtool_coalesce *ec)
The size of these fields in the register determines the limitations of
the various parameters that this chip can support.
Therefore you must validate the user's request and signal an error if
the user asks for coalescing parameters that don't fit into those
fields.
next prev parent reply other threads:[~2014-09-16 20:45 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-16 17:58 [Patch net-next v2 0/4] net: fec: add interrupt coalescence Frank.Li
2014-09-16 17:58 ` [Patch net-next v2 1/4] net: fec: refine error handle of parser queue number from DT Frank.Li
2014-09-16 17:58 ` [Patch net-next v2 2/4] net: fec: add interrupt coalescence feature support Frank.Li
2014-09-16 20:45 ` David Miller [this message]
2014-09-16 17:58 ` [Patch net-next v2 3/4] net:fec: increase DMA queue number Frank.Li
2014-09-16 17:58 ` [Patch net-next v2 4/4] net: fec: Workaround for imx6sx enet tx hang when enable three queues Frank.Li
2014-09-16 20:52 ` Fabio Estevam
2014-09-16 21:24 ` Zhi Li
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