From: Will Deacon <will.deacon@arm.com>
To: Alexander Duyck <alexander.h.duyck@redhat.com>
Cc: "linux-arch@vger.kernel.org" <linux-arch@vger.kernel.org>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
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"paulmck@linux.vnet.ibm.com" <paulmck@linux.vnet.ibm.com>,
"nic_swsd@realtek.com" <nic_
Subject: Re: [PATCH v5 2/4] arch: Add lightweight memory barriers dma_rmb() and dma_wmb()
Date: Wed, 26 Nov 2014 16:04:56 +0000 [thread overview]
Message-ID: <20141126160456.GJ14866@arm.com> (raw)
In-Reply-To: <5474ADB4.5070200@redhat.com>
On Tue, Nov 25, 2014 at 04:26:28PM +0000, Alexander Duyck wrote:
> On 11/25/2014 06:01 AM, Will Deacon wrote:
> > If we ever see platforms using Linux/dma_alloc_coherent with devices
> > mastering from a different outer-shareable domain that the one containing
> > the CPUs, then we'll need to revisit this.
>
> Would we just need a system wide memory barrier in that case instead of
> an outer shareable memory barrier, or would we need to look as something
> like a sync barrier?
I think dmb(sy) would do the trick, but let's cross that bridge if/when we
have to.
Will
next prev parent reply other threads:[~2014-11-26 16:04 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-19 1:23 [PATCH v5 0/4] arch: Add lightweight memory barriers for coherent memory access Alexander Duyck
2014-11-19 1:23 ` [PATCH v5 1/4] arch: Cleanup read_barrier_depends() and comments Alexander Duyck
2014-11-19 1:24 ` [PATCH v5 2/4] arch: Add lightweight memory barriers dma_rmb() and dma_wmb() Alexander Duyck
2014-11-25 14:01 ` Will Deacon
2014-11-25 16:26 ` Alexander Duyck
2014-11-26 16:04 ` Will Deacon [this message]
2014-11-25 23:15 ` Benjamin Herrenschmidt
2014-11-19 1:24 ` [PATCH v5 3/4] r8169: Use dma_rmb() and dma_wmb() for DescOwn checks Alexander Duyck
2014-11-19 1:24 ` [PATCH v5 4/4] fm10k/igb/ixgbe: Use dma_rmb on Rx descriptor reads Alexander Duyck
2014-11-19 1:28 ` Jeff Kirsher
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