From: David Miller <davem@davemloft.net>
To: thomas.lendacky@amd.com
Cc: netdev@vger.kernel.org
Subject: Re: [PATCH net] amd-xgbe: Check per channel DMA interrupt use in main ISR
Date: Sat, 07 Feb 2015 22:45:45 -0800 (PST) [thread overview]
Message-ID: <20150207.224545.2294450094908030704.davem@davemloft.net> (raw)
In-Reply-To: <20150206011714.2507.45712.stgit@tlendack-t1.amdoffice.net>
From: Tom Lendacky <thomas.lendacky@amd.com>
Date: Thu, 5 Feb 2015 19:17:14 -0600
> When using per channel DMA interrupts the transmit interrupt (TI) and the
> receive interrupt (RI) are masked off so as to not generate an interrupt
> to the main ISR. However, should another interrupt fire for the DMA channel
> that is handled by the main ISR the TI/RI bits can still be set. This
> will cause the wrong and uninitialized napi structure to be used causing a
> panic. Add a check to be sure per channel DMA interrupts are not enabled
> before acting on those bit flags.
>
> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Applied.
prev parent reply other threads:[~2015-02-08 6:45 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-06 1:17 [PATCH net] amd-xgbe: Check per channel DMA interrupt use in main ISR Tom Lendacky
2015-02-08 6:45 ` David Miller [this message]
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