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From: Andrew Lunn <andrew@lunn.ch>
To: Duan Andy <fugang.duan@freescale.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>,
	David Miller <davem@davemloft.net>,
	Cory Tusar <cory.tusar@pid1solutions.com>,
	netdev <netdev@vger.kernel.org>
Subject: Re: [PATCH] net: fec: Ensure clocks are enabled while using mdio bus
Date: Mon, 15 Jun 2015 05:15:33 +0200	[thread overview]
Message-ID: <20150615031533.GA10886@lunn.ch> (raw)
In-Reply-To: <BLUPR03MB373121D2B0C2168C5193A2EF5B80@BLUPR03MB373.namprd03.prod.outlook.com>

Hi Andy

> If so, it just need to enable ENET ipg clock for your cases, not all enet clocks.
> Ipg clock is for MDIO bus read/write, for ENET registers accessing. (fep->clk_ipg)

O.K, thanks. I will respin the patch with just the ipg clock.

> Which switch phy do you use ? I tried BCM54220 switch on the driver that works fine.

I'm using two mv88e6352 and a mv88e6185 in cascade.

    Andrew

      reply	other threads:[~2015-06-15  3:21 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-12 15:39 [PATCH] net: fec: Ensure clocks are enabled while using mdio bus Andrew Lunn
2015-06-14  8:07 ` Duan Andy
2015-06-14 14:41   ` Andrew Lunn
2015-06-14 19:31     ` Florian Fainelli
2015-06-15  1:43       ` Duan Andy
2015-06-15  3:15         ` Andrew Lunn [this message]

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