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From: Andrew Lunn <andrew@lunn.ch>
To: Duan Andy <fugang.duan@freescale.com>
Cc: Lothar Wa?mann <LW@KARO-electronics.de>,
	"David S. Miller" <davem@davemloft.net>,
	Fabio Estevam <Fabio.Estevam@freescale.com>,
	Kevin Hao <haokexin@gmail.com>,
	Lucas Stach <l.stach@pengutronix.de>,
	Philippe Reynes <tremyfr@gmail.com>,
	Russell King <rmk+kernel@arm.linux.org.uk>,
	Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
	Stefan Agner <stefan@agner.ch>
Subject: Re: [PATCH] net: fec: fix enet_out clock handling
Date: Mon, 30 Nov 2015 02:58:23 +0100	[thread overview]
Message-ID: <20151130015823.GA32662@lunn.ch> (raw)
In-Reply-To: <BN3PR0301MB12193BED335F9781168308CCF5000@BN3PR0301MB1219.namprd03.prod.outlook.com>

> Do you mean PHY switch also use the enet_out clock ?

Yes, the Marvell switches i've have connected to a Vybrid use enet_out
clock. There was a recent change to IMX pinctrl which broke the muxing
for ENET_OUT on Vydrid, which broke the probing of these switches. It
was no longer possible to mux the pin as ENET_OUT, and the switches
disappeared.

	Andrew

  reply	other threads:[~2015-11-30  1:58 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-27 13:39 [PATCH] net: fec: fix enet_out clock handling Lothar Waßmann
2015-11-27 15:16 ` Michael Heimpold
2015-11-28 13:13 ` Duan Andy
2015-11-28 16:43   ` Andrew Lunn
2015-11-30  1:46     ` Duan Andy
2015-11-30  1:58       ` Andrew Lunn [this message]
2015-11-30  6:56   ` Lothar Waßmann
2015-11-30  7:31     ` Duan Andy
2015-11-30  2:07 ` Andrew Lunn
2015-11-30  5:37   ` Lothar Waßmann

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