From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Lunn Subject: Re: [PATCH] net: fec: fix enet_out clock handling Date: Mon, 30 Nov 2015 02:58:23 +0100 Message-ID: <20151130015823.GA32662@lunn.ch> References: <1448631550-943-1-git-send-email-LW@KARO-electronics.de> <20151128164337.GF32356@lunn.ch> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: Lothar Wa?mann , "David S. Miller" , Fabio Estevam , Kevin Hao , Lucas Stach , Philippe Reynes , Russell King , Uwe Kleine-K?nig , "linux-kernel@vger.kernel.org" , "netdev@vger.kernel.org" , Stefan Agner To: Duan Andy Return-path: Content-Disposition: inline In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org List-Id: netdev.vger.kernel.org > Do you mean PHY switch also use the enet_out clock ? Yes, the Marvell switches i've have connected to a Vybrid use enet_out clock. There was a recent change to IMX pinctrl which broke the muxing for ENET_OUT on Vydrid, which broke the probing of these switches. It was no longer possible to mux the pin as ENET_OUT, and the switches disappeared. Andrew