From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
To: Jisheng Zhang <jszhang@marvell.com>
Cc: <davem@davemloft.net>, <mw@semihalf.com>, <robh+dt@kernel.org>,
<pawel.moll@arm.com>, <mark.rutland@arm.com>,
<ijc+devicetree@hellion.org.uk>, <galak@codeaurora.org>,
<devicetree@vger.kernel.org>, <netdev@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <sebastian.hesselbarth@gmail.com>,
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 3/4] net: mvneta: mmc: get optional axi clk
Date: Wed, 20 Jan 2016 09:51:32 +0100 [thread overview]
Message-ID: <20160120095132.29896293@free-electrons.com> (raw)
In-Reply-To: <1453277183-5412-4-git-send-email-jszhang@marvell.com>
Dear Jisheng Zhang,
On Wed, 20 Jan 2016 16:06:22 +0800, Jisheng Zhang wrote:
> Some platforms may provide more than one clk for the mvneta IP, for
> example Marvell BG4CT provides "core" clk for the mac core, and
> "axi" clk for the AXI bus logic. Obviously this "axi" clk also need to
> be enabled. This patch adds this optional "axi" clk support.
>
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Typo in the title, you have "mmc: ", while this patch is not related to
MMC, unless I'm missing something and MMC means something else in this
context.
> clk_prepare_enable(pp->clk);
>
> + pp->clk_axi = devm_clk_get(&pdev->dev, "axi");
> + if (!IS_ERR(pp->clk_axi))
> + clk_prepare_enable(pp->clk_axi);
> +
> res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> pp->base = devm_ioremap_resource(&pdev->dev, res);
> if (IS_ERR(pp->base)) {
> @@ -3727,6 +3733,7 @@ err_free_ports:
> free_percpu(pp->ports);
> err_clk:
> clk_disable_unprepare(pp->clk);
> + clk_disable_unprepare(pp->clk_axi);
For the error paths and cleanup steps, I very much prefer when things
are done in the opposite order of the allocation/creation steps. So can
you clk_disable_unprepare() the AXI clock before the core clock ?
> err_put_phy_node:
> of_node_put(phy_node);
> err_free_irq:
> @@ -3744,6 +3751,7 @@ static int mvneta_remove(struct platform_device *pdev)
>
> unregister_netdev(dev);
> clk_disable_unprepare(pp->clk);
> + clk_disable_unprepare(pp->clk_axi);
Ditto.
Thanks!
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
next prev parent reply other threads:[~2016-01-20 8:51 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-20 8:06 [PATCH 0/4] net: mvneta: support more than one clk Jisheng Zhang
2016-01-20 8:06 ` [PATCH 1/4] net: mvneta: sort the headers in alphabetic order Jisheng Zhang
[not found] ` <1453277183-5412-2-git-send-email-jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
2016-01-20 8:46 ` Thomas Petazzoni
2016-01-20 8:06 ` [PATCH 2/4] net: mvneta: Try to get named core clock first Jisheng Zhang
[not found] ` <1453277183-5412-3-git-send-email-jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
2016-01-20 8:47 ` Thomas Petazzoni
2016-01-20 8:06 ` [PATCH 3/4] net: mvneta: mmc: get optional axi clk Jisheng Zhang
2016-01-20 8:51 ` Thomas Petazzoni [this message]
2016-01-20 8:53 ` Jisheng Zhang
[not found] ` <1453277183-5412-4-git-send-email-jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
2016-01-20 9:31 ` Sebastian Hesselbarth
[not found] ` <1525e5fba70.2764.107cef0f820c2f5d7b7f41463071c310-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-01-20 9:42 ` Jisheng Zhang
2016-01-20 11:03 ` Sebastian Hesselbarth
[not found] ` <569F6967.9040302-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-01-20 11:11 ` Jisheng Zhang
[not found] ` <1453277183-5412-1-git-send-email-jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
2016-01-20 8:06 ` [PATCH 4/4] net: mvneta: update clocks property and document additional clock-names Jisheng Zhang
2016-01-20 9:07 ` Thomas Petazzoni
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