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From: David Miller <davem-fT/PcQaiUtIeIZ0/mPfg9Q@public.gmane.org>
To: jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org
Cc: thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org,
	mw-nYOzD4b6Jr9Wk0Htik3J/w@public.gmane.org,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	pawel.moll-5wv7dgnIgG8@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org,
	galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH v3 0/4] net: mvneta: support more than one clk
Date: Thu, 21 Jan 2016 12:05:32 -0800 (PST)	[thread overview]
Message-ID: <20160121.120532.2109574129268460718.davem@davemloft.net> (raw)
In-Reply-To: <1453289245-2061-1-git-send-email-jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>

From: Jisheng Zhang <jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
Date: Wed, 20 Jan 2016 19:27:21 +0800

> Some platforms may provide more than one clk for the mvneta IP, for
> example Marvell BG4CT provides "core" clk for the mac core, and "axi"
> clk for the AXI bus logic.
> 
> This series tries to addess the "more than one clk" issue. Note: to
> support BG4CT, we have lots of refactor work to do, eg. BG4CT doesn't
> have mbus concept etc.
> 
> Since v2:
>  - Name the optional clock as "bus", which is a bit more flexible.
> 
> Since v1:
>  - Add Thomas Acks to patch1 and patch2.
>  - make sure the headers are really sorted (some headers are still
>    unsorted in v1).
>  - disable axi clk before disabling core clk, Thank Thomas.
>  - update dt binding as Thomas suggested.

Series applied, thanks.
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      parent reply	other threads:[~2016-01-21 20:05 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-01-20 11:27 [PATCH v3 0/4] net: mvneta: support more than one clk Jisheng Zhang
2016-01-20 11:27 ` [PATCH v3 1/4] net: mvneta: sort the headers in alphabetic order Jisheng Zhang
2016-01-20 11:27 ` [PATCH v3 2/4] net: mvneta: Try to get named core clock first Jisheng Zhang
2016-01-20 11:27 ` [PATCH v3 4/4] net: mvneta: update clocks property and document additional clock-names Jisheng Zhang
2016-01-20 16:29   ` Rob Herring
     [not found] ` <1453289245-2061-1-git-send-email-jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
2016-01-20 11:27   ` [PATCH v3 3/4] net: mvneta: get optional bus clk Jisheng Zhang
2016-01-21 20:05   ` David Miller [this message]

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