From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jiri Pirko <jiri@resnulli.us>
Subject: Re: [PATCH 3/4] infiniband: hns: add Hisilicon RoCE support(driver
 code)
Date: Fri, 4 Mar 2016 10:16:28 +0100
Message-ID: <20160304091628.GB2150@nanopsycho.orion>
References: <1457080877-13456-1-git-send-email-xavier.huwei@huawei.com>
 <1457080877-13456-4-git-send-email-xavier.huwei@huawei.com>
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To: "Wei Hu(Xavier)" <xavier.huwei@huawei.com>
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Fri, Mar 04, 2016 at 09:41:16AM CET, xavier.huwei@huawei.com wrote:

<snip>

>+int hns_roce_buf_alloc(
>+			struct hns_roce_dev *hr_dev,
>+			int size, int max_direct,
>+			struct hns_roce_buf *buf)

<snip>	
	
>+
>+			pages =
>+				kmalloc(sizeof(*pages) * buf->nbufs,
>+					GFP_KERNEL);

<snip>

>+
>+			buf->direct.buf = vmap(
>+						pages, buf->nbufs, VM_MAP,
>+						PAGE_KERNEL);

<snip>

>+	if (
>+		event_type != HNS_ROCE_EVENT_TYPE_CQ_ID_INVALID &&
>+		event_type != HNS_ROCE_EVENT_TYPE_CQ_ACCESS_ERROR &&
>+		event_type != HNS_ROCE_EVENT_TYPE_CQ_OVERFLOW) {
>+		dev_err(&hr_dev->pdev->dev,
>+			"hns_roce_ib: Unexpected event type 0x%x on CQ %06x\n",
>+			event_type, hr_cq->cqn);
>+		return;
>+	}

Although checkpatch does not complain, I find this semi-random adding of
newlines quite odd.