From: Leon Romanovsky <leon@kernel.org>
To: Lijun Ou <oulijun@huawei.com>
Cc: dledford@redhat.com, sean.hefty@intel.com,
hal.rosenstock@gmail.com, davem@davemloft.net,
jeffrey.t.kirsher@intel.com, jiri@mellanox.com,
ogerlitz@mellanox.com, linuxarm@huawei.com,
linux-rdma@vger.kernel.org, linux-kernel@vger.kernel.org,
netdev@vger.kernel.org, gongyangming@huawei.com,
xiaokun@huawei.com, tangchaofei@huawei.com,
haifeng.wei@huawei.com, yisen.zhuang@huawei.com,
yankejian@huawei.com, lisheng011@huawei.com,
charles.chenxin@huawei.com
Subject: Re: [PATCH v5 09/21] IB/hns: Add hca support
Date: Sun, 24 Apr 2016 10:54:24 +0300 [thread overview]
Message-ID: <20160424075424.GE7974@leon.nu> (raw)
In-Reply-To: <1461407219-72027-10-git-send-email-oulijun@huawei.com>
[-- Attachment #1: Type: text/plain, Size: 2645 bytes --]
On Sat, Apr 23, 2016 at 06:26:47PM +0800, Lijun Ou wrote:
> This patch mainly setup hca for RoCE. it will do a series of
> initial works as follows:
> 1. init uar table, allocate uar resource
> 2. init pd table
> 3. init cq table
> 4. init mr table
> 5. init qp table
>
> Signed-off-by: Lijun Ou <oulijun@huawei.com>
> Signed-off-by: Wei Hu(Xavier) <xavier.huwei@huawei.com>
> ---
> drivers/infiniband/hw/hns/hns_roce_alloc.c | 104 ++++++++++++++++
> drivers/infiniband/hw/hns/hns_roce_cq.c | 25 ++++
> drivers/infiniband/hw/hns/hns_roce_device.h | 69 ++++++++++
> drivers/infiniband/hw/hns/hns_roce_eq.c | 1 -
> drivers/infiniband/hw/hns/hns_roce_icm.c | 88 +++++++++++++
> drivers/infiniband/hw/hns/hns_roce_icm.h | 9 ++
> drivers/infiniband/hw/hns/hns_roce_main.c | 79 ++++++++++++
> drivers/infiniband/hw/hns/hns_roce_mr.c | 187 ++++++++++++++++++++++++++++
> drivers/infiniband/hw/hns/hns_roce_pd.c | 65 ++++++++++
> drivers/infiniband/hw/hns/hns_roce_qp.c | 30 +++++
> 10 files changed, 656 insertions(+), 1 deletion(-)
> create mode 100644 drivers/infiniband/hw/hns/hns_roce_alloc.c
> create mode 100644 drivers/infiniband/hw/hns/hns_roce_mr.c
> create mode 100644 drivers/infiniband/hw/hns/hns_roce_pd.c
>
> diff --git a/drivers/infiniband/hw/hns/hns_roce_alloc.c b/drivers/infiniband/hw/hns/hns_roce_alloc.c
> new file mode 100644
> index 0000000..0c76f1b
> --- /dev/null
> +++ b/drivers/infiniband/hw/hns/hns_roce_alloc.c
> @@ -0,0 +1,104 @@
> +/*
> + * Copyright (c) 2016 Hisilicon Limited.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +
> +#include <linux/bitmap.h>
> +#include <linux/dma-mapping.h>
> +#include <linux/errno.h>
> +#include <linux/mm.h>
> +#include <linux/slab.h>
> +#include <linux/vmalloc.h>
> +#include "hns_roce_device.h"
> +
> +int hns_roce_bitmap_alloc(struct hns_roce_bitmap *bitmap, u32 *obj)
> +{
> + int ret = 0;
> +
> + spin_lock(&bitmap->lock);
> + *obj = find_next_zero_bit(bitmap->table, bitmap->max, bitmap->last);
> + if (*obj >= bitmap->max) {
> + bitmap->top = (bitmap->top + bitmap->max + bitmap->reserved_top)
> + & bitmap->mask;
> + *obj = find_first_zero_bit(bitmap->table, bitmap->max);
find_first_zero_bit function returns "unsigned long" which may or may
not be equal to u32 on some architectures.
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 819 bytes --]
next prev parent reply other threads:[~2016-04-24 7:54 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-23 10:26 [PATCH v5 00/21] Add HiSilicon RoCE driver Lijun Ou
2016-04-23 10:26 ` [PATCH v5 01/21] net: hns: Add reset function support for " Lijun Ou
2016-04-23 10:26 ` [PATCH v5 02/21] devicetree: bindings: IB: Add binding document for HiSilicon RoCE Lijun Ou
2016-04-23 10:26 ` [PATCH v5 03/21] IB/hns: Add initial main frame driver and get cfg info Lijun Ou
2016-04-23 10:26 ` [PATCH v5 04/21] IB/hns: Add RoCE engine reset function Lijun Ou
[not found] ` <1461407219-72027-1-git-send-email-oulijun-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2016-04-23 10:26 ` [PATCH v5 05/21] IB/hns: Add initial profile resource Lijun Ou
2016-04-23 10:26 ` [PATCH v5 06/21] IB/hns: Add initial cmd operation Lijun Ou
2016-04-23 10:26 ` [PATCH v5 07/21] IB/hns: Add event queue support Lijun Ou
2016-04-23 10:26 ` [PATCH v5 08/21] IB/hns: Add icm support Lijun Ou
2016-04-23 10:26 ` [PATCH v5 09/21] IB/hns: Add hca support Lijun Ou
2016-04-24 7:54 ` Leon Romanovsky [this message]
[not found] ` <20160424075424.GE7974-2ukJVAZIZ/Y@public.gmane.org>
2016-04-26 6:34 ` oulijun
[not found] ` <571F0C04.2010005-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2016-04-26 14:18 ` Leon Romanovsky
2016-04-26 14:25 ` Jiri Pirko
[not found] ` <20160426142517.GA1937-6KJVSR23iU488b5SBfVpbw@public.gmane.org>
2016-04-27 3:34 ` oulijun
[not found] ` <57203347.4000107-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2016-04-30 4:33 ` Or Gerlitz
2016-05-03 7:57 ` Wei Hu (Xavier)
2016-05-03 8:14 ` Or Gerlitz
2016-05-03 8:39 ` Wei Hu (Xavier)
[not found] ` <20160426141821.GJ7974-2ukJVAZIZ/Y@public.gmane.org>
2016-04-27 3:37 ` oulijun
2016-04-23 10:26 ` [PATCH v5 10/21] IB/hns: Add process flow to init RoCE engine Lijun Ou
2016-04-23 10:26 ` [PATCH v5 11/21] IB/hns: Add IB device registration function Lijun Ou
2016-04-23 10:26 ` [PATCH v5 12/21] IB/hns: Set mtu and gid support Lijun Ou
2016-04-23 10:26 ` [PATCH v5 13/21] IB/hns: Add interface of the protocol stack registration Lijun Ou
2016-04-23 10:26 ` [PATCH v5 14/21] IB/hns: Add operations support for IB device and port Lijun Ou
2016-04-23 10:26 ` [PATCH v5 15/21] IB/hns: Add PD operations support Lijun Ou
2016-04-23 10:26 ` [PATCH v5 16/21] IB/hns: Add ah operation support Lijun Ou
2016-04-23 10:26 ` [PATCH v5 17/21] IB/hns: Add QP operation implemention support Lijun Ou
2016-04-23 10:26 ` [PATCH v5 18/21] IB/hns: Add CQ " Lijun Ou
2016-04-23 10:26 ` [PATCH v5 19/21] IB/hns: Add memory region operation support Lijun Ou
2016-04-23 10:26 ` [PATCH v5 20/21] IB/hns: Kconfig and Makefile for RoCE module Lijun Ou
2016-04-23 10:26 ` [PATCH v5 21/21] MAINTAINERS: Add maintainers for HiSilicon RoCE driver Lijun Ou
2016-04-24 7:44 ` [PATCH v5 00/21] Add " Leon Romanovsky
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20160424075424.GE7974@leon.nu \
--to=leon@kernel.org \
--cc=charles.chenxin@huawei.com \
--cc=davem@davemloft.net \
--cc=dledford@redhat.com \
--cc=gongyangming@huawei.com \
--cc=haifeng.wei@huawei.com \
--cc=hal.rosenstock@gmail.com \
--cc=jeffrey.t.kirsher@intel.com \
--cc=jiri@mellanox.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-rdma@vger.kernel.org \
--cc=linuxarm@huawei.com \
--cc=lisheng011@huawei.com \
--cc=netdev@vger.kernel.org \
--cc=ogerlitz@mellanox.com \
--cc=oulijun@huawei.com \
--cc=sean.hefty@intel.com \
--cc=tangchaofei@huawei.com \
--cc=xiaokun@huawei.com \
--cc=yankejian@huawei.com \
--cc=yisen.zhuang@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).