[PATCH 0/2] sh_eth: couple of software reset bit cleanups

[PATCH 0/2] sh_eth: couple of software reset bit cleanups

[Sergei Shtylyov]

Hello.

   Here's a set of 2 patches against DaveM's 'net-next.git' repo. We clean up
the use of the software reset bits...

[1/2] sh_eth: use EDMR_SRST_GETHER in sh_eth_check_reset()
[2/2] sh_eth: rename ARSTR register bit

MBR, Sergei

[PATCH 1/2] sh_eth: use EDMR_SRST_GETHER in sh_eth_check_reset()

[Sergei Shtylyov]

sh_eth_check_reset() uses a bare number where EDMR_SRST_GETHER would fit,
i.e. the receive/trasmit software reset bits that comprise EDMR_SRST_GETHER
read as 1  while the corresponding reset is in progress and thus, when both
are 0, the reset is complete.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

---
 drivers/net/ethernet/renesas/sh_eth.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Index: net-next/drivers/net/ethernet/renesas/sh_eth.c
===================================================================
--- net-next.orig/drivers/net/ethernet/renesas/sh_eth.c
+++ net-next/drivers/net/ethernet/renesas/sh_eth.c
@@ -899,7 +899,7 @@ static int sh_eth_check_reset(struct net
 	int cnt = 100;
 
 	while (cnt > 0) {
-		if (!(sh_eth_read(ndev, EDMR) & 0x3))
+		if (!(sh_eth_read(ndev, EDMR) & EDMR_SRST_GETHER))
 			break;
 		mdelay(1);
 		cnt--;

Re: [PATCH 1/2] sh_eth: use EDMR_SRST_GETHER in sh_eth_check_reset()

[Simon Horman]

On Sun, Apr 24, 2016 at 11:45:23PM +0300, Sergei Shtylyov wrote:
> sh_eth_check_reset() uses a bare number where EDMR_SRST_GETHER would fit,
> i.e. the receive/trasmit software reset bits that comprise EDMR_SRST_GETHER
> read as 1  while the corresponding reset is in progress and thus, when both
> are 0, the reset is complete.
> 
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

[PATCH 2/2] sh_eth: rename ARSTR register bit

[Sergei Shtylyov]

The Renesas RZ/A1H manual names the software reset bit in the software reset
register (ARSTR) ARST which makes a bit more sense than the ARSTR_ARSTR name
used now  by the driver -- rename the latter to ARSTR_ARST.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

---
 drivers/net/ethernet/renesas/sh_eth.c |    6 +++---
 drivers/net/ethernet/renesas/sh_eth.h |    2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

Index: net-next/drivers/net/ethernet/renesas/sh_eth.c
===================================================================
--- net-next.orig/drivers/net/ethernet/renesas/sh_eth.c
+++ net-next/drivers/net/ethernet/renesas/sh_eth.c
@@ -482,7 +482,7 @@ static void sh_eth_chip_reset(struct net
 	struct sh_eth_private *mdp = netdev_priv(ndev);
 
 	/* reset device */
-	sh_eth_tsu_write(mdp, ARSTR_ARSTR, ARSTR);
+	sh_eth_tsu_write(mdp, ARSTR_ARST, ARSTR);
 	mdelay(1);
 }
 
@@ -540,7 +540,7 @@ static void sh_eth_chip_reset_r8a7740(st
 	struct sh_eth_private *mdp = netdev_priv(ndev);
 
 	/* reset device */
-	sh_eth_tsu_write(mdp, ARSTR_ARSTR, ARSTR);
+	sh_eth_tsu_write(mdp, ARSTR_ARST, ARSTR);
 	mdelay(1);
 
 	sh_eth_select_mii(ndev);
@@ -735,7 +735,7 @@ static void sh_eth_chip_reset_giga(struc
 	}
 
 	/* reset device */
-	iowrite32(ARSTR_ARSTR, (void *)(SH_GIGA_ETH_BASE + 0x1800));
+	iowrite32(ARSTR_ARST, (void *)(SH_GIGA_ETH_BASE + 0x1800));
 	mdelay(1);
 
 	/* restore MAHR and MALR */
Index: net-next/drivers/net/ethernet/renesas/sh_eth.h
===================================================================
--- net-next.orig/drivers/net/ethernet/renesas/sh_eth.h
+++ net-next/drivers/net/ethernet/renesas/sh_eth.h
@@ -394,7 +394,7 @@ enum RPADIR_BIT {
 #define DEFAULT_FDR_INIT	0x00000707
 
 /* ARSTR */
-enum ARSTR_BIT { ARSTR_ARSTR = 0x00000001, };
+enum ARSTR_BIT { ARSTR_ARST = 0x00000001, };
 
 /* TSU_FWEN0 */
 enum TSU_FWEN0_BIT {

Re: [PATCH 2/2] sh_eth: rename ARSTR register bit

[Simon Horman]

On Sun, Apr 24, 2016 at 11:46:15PM +0300, Sergei Shtylyov wrote:
> The Renesas RZ/A1H manual names the software reset bit in the software reset
> register (ARSTR) ARST which makes a bit more sense than the ARSTR_ARSTR name
> used now  by the driver -- rename the latter to ARSTR_ARST.
> 
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Re: [PATCH 0/2] sh_eth: couple of software reset bit cleanups

[David Miller]

From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Date: Sun, 24 Apr 2016 23:42:48 +0300

>    Here's a set of 2 patches against DaveM's 'net-next.git' repo. We clean up
> the use of the software reset bits...
> 
> [1/2] sh_eth: use EDMR_SRST_GETHER in sh_eth_check_reset()
> [2/2] sh_eth: rename ARSTR register bit

Series applied, thanks.

[PATCH 0/2] sh_eth: couple of software reset bit cleanups

[Sergei Shtylyov]

Hello.

   Here's a set of 2 patches against DaveM's 'net-next.git' repo. We can save
on the repetitive chip reset code...

[1/2] sh_eth: call sh_eth_tsu_write() from sh_eth_chip_reset_giga()
[2/2] sh_eth: reuse sh_eth_chip_reset()

MBR, Sergei

Re: [PATCH 0/2] sh_eth: couple of software reset bit cleanups

[David Miller]

From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Date: Sun, 08 May 2016 00:06:53 +0300

>    Here's a set of 2 patches against DaveM's 'net-next.git' repo. We can save
> on the repetitive chip reset code...
> 
> [1/2] sh_eth: call sh_eth_tsu_write() from sh_eth_chip_reset_giga()
> [2/2] sh_eth: reuse sh_eth_chip_reset()

Series applied, thanks.