From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alexander Duyck Subject: [net-next PATCH v3 6/8] net/mlx5e: Add support for UDP tunnel segmentation with outer checksum offload Date: Mon, 02 May 2016 09:38:43 -0700 Message-ID: <20160502163843.11809.23302.stgit@ahduyck-xeon-server> References: <20160502162828.11809.92444.stgit@ahduyck-xeon-server> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: talal@mellanox.com, netdev@vger.kernel.org, michael.chan@broadcom.com, alexander.duyck@gmail.com, davem@davemloft.net, galp@mellanox.com, ogerlitz@mellanox.com, eranbe@mellanox.com Return-path: Received: from mail-pa0-f50.google.com ([209.85.220.50]:33881 "EHLO mail-pa0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754552AbcEBQip (ORCPT ); Mon, 2 May 2016 12:38:45 -0400 Received: by mail-pa0-f50.google.com with SMTP id r5so77768551pag.1 for ; Mon, 02 May 2016 09:38:44 -0700 (PDT) In-Reply-To: <20160502162828.11809.92444.stgit@ahduyck-xeon-server> Sender: netdev-owner@vger.kernel.org List-ID: This patch assumes that the mlx5 hardware will ignore existing IPv4/v6 header fields for length and checksum as well as the length and checksum fields for outer UDP headers. Signed-off-by: Alexander Duyck --- drivers/net/ethernet/mellanox/mlx5/core/en_main.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c index 4ccfc1ac62c5..2d6aaad77d62 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c @@ -2803,13 +2803,18 @@ static void mlx5e_build_netdev(struct net_device *netdev) netdev->hw_features |= NETIF_F_HW_VLAN_CTAG_FILTER; if (mlx5e_vxlan_allowed(mdev)) { - netdev->hw_features |= NETIF_F_GSO_UDP_TUNNEL; + netdev->hw_features |= NETIF_F_GSO_UDP_TUNNEL | + NETIF_F_GSO_UDP_TUNNEL_CSUM | + NETIF_F_GSO_PARTIAL; netdev->hw_enc_features |= NETIF_F_IP_CSUM; netdev->hw_enc_features |= NETIF_F_RXCSUM; netdev->hw_enc_features |= NETIF_F_TSO; netdev->hw_enc_features |= NETIF_F_TSO6; netdev->hw_enc_features |= NETIF_F_RXHASH; netdev->hw_enc_features |= NETIF_F_GSO_UDP_TUNNEL; + netdev->hw_enc_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM | + NETIF_F_GSO_PARTIAL; + netdev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM; } mlx5_query_port_fcs(mdev, &fcs_supported, &fcs_enabled);