From: David Miller <davem@davemloft.net>
To: stefan@shauser.net
Cc: netdev@vger.kernel.org, f.fainelli@gmail.com
Subject: Re: [PATCH] net: phy: dp83867: Fix initialization of PHYCR register
Date: Sat, 02 Jul 2016 14:49:24 -0400 (EDT) [thread overview]
Message-ID: <20160702.144924.2057687330898460203.davem@davemloft.net> (raw)
In-Reply-To: <1467405303-19212-1-git-send-email-stefan@shauser.net>
From: Stefan Hauser <stefan@shauser.net>
Date: Fri, 1 Jul 2016 22:35:03 +0200
> When initializing the PHY control register, the FIFO depth bits are
> written without reading the previous register value, i.e. all other
> bits are overwritten with zero. This disables automatic MDI-X
> configuration, which is enabled by default. Fix initialization by doing
> a read/modify/write operation.
>
> Signed-off-by: Stefan Hauser <stefan@shauser.net>
Applied.
prev parent reply other threads:[~2016-07-02 18:49 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-01 20:35 [PATCH] net: phy: dp83867: Fix initialization of PHYCR register Stefan Hauser
2016-07-02 17:01 ` Florian Fainelli
2016-07-02 18:49 ` David Miller [this message]
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