From: Andrew Lunn <andrew@lunn.ch>
To: John Crispin <john@phrozen.org>
Cc: Florian Fainelli <f.fainelli@gmail.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>
Subject: Re: dsa: handling more than 1 cpu port
Date: Wed, 14 Dec 2016 11:31:53 +0100 [thread overview]
Message-ID: <20161214103153.GC27370@lunn.ch> (raw)
In-Reply-To: <1671ae82-c213-7611-584f-02a3b1d5dff9@phrozen.org>
On Wed, Dec 14, 2016 at 11:01:54AM +0100, John Crispin wrote:
> Hi Andrew,
>
> switches supported by qca8k have 2 gmacs that we can wire an external
> mii interface to. Usually this is used to wire 2 of the SoCs MACs to the
> switch. Thw switch itself is aware of one of the MACs being the cpu port
> and expects this to be port/mac0. Using the other will break the
> hardware offloading features.
Just to be sure here. There is no way to use the second port connected
to the CPU as a CPU port?
The Marvell chips do allow this. So i developed a proof of concept
which had a mapping between cpu ports and slave ports. slave port X
should you cpu port y for its traffic. This never got past proof of
concept.
If this can be made to work for qca8k, i would prefer having this
general concept, than specific hacks for pass through.
Andrew
next prev parent reply other threads:[~2016-12-14 10:31 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-14 10:01 dsa: handling more than 1 cpu port John Crispin
2016-12-14 10:31 ` Andrew Lunn [this message]
2016-12-14 10:35 ` John Crispin
2016-12-14 11:00 ` Andrew Lunn
2016-12-14 11:11 ` John Crispin
2016-12-14 15:45 ` John Crispin
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