From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Lunn Subject: Re: [PATCH net-next v6 4/4] phy: marvell: Add support for the PHY embedded in the topaz switch Date: Tue, 24 Jan 2017 21:28:47 +0100 Message-ID: <20170124202847.GV10895@lunn.ch> References: Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: Vivien Didelot , Florian Fainelli , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "David S. Miller" , Jason Cooper , Sebastian Hesselbarth , Thomas Petazzoni , linux-arm-kernel@lists.infradead.org, Nadav Haklai , Wilson Ding , Kostya Porotchkin , Joe Zhou , Jon Pannell To: Gregory CLEMENT Return-path: Content-Disposition: inline In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org List-Id: netdev.vger.kernel.org On Tue, Jan 24, 2017 at 09:10:26PM +0100, Gregory CLEMENT wrote: > The PHY with the ID 0x1410C00 :-( I don't have a better reference, but Linux/Documentation/devicetree/bindings/net/phy.txt says: 22 If the phy's identifier is known then the list may contain an entry 23 of the form: "ethernet-phy-idAAAA.BBBB" where 24 AAAA - The value of the 16 bit Phy Identifier 1 register as 25 4 hex digits. This is the chip vendor OUI bits 3:18 26 BBBB - The value of the 16 bit Phy Identifier 2 register as 27 4 hex digits. This is the chip vendor OUI bits 19:24, 28 followed by 10 bits of a vendor specific ID. So the lower 10 bits of 0x1410C00 are 0. So we know it is a Marvell PHY from the OUI, but the vendor specific bits are all 0. Please take a look at: https://marc.info/?l=linux-netdev&m=148495522620757&w=1 and https://marc.info/?l=linux-netdev&m=148495510320714&w=1 Maybe i should submit these two independently, so you can extend it for the 88E6341 family. Andrew