From mboxrd@z Thu Jan 1 00:00:00 1970 From: Florian Fainelli Subject: [PATCH net-next v5 2/4] net: dsa: b53: Add mirror capture register definitions Date: Mon, 30 Jan 2017 12:41:41 -0800 Message-ID: <20170130204143.539-3-f.fainelli@gmail.com> References: <20170130204143.539-1-f.fainelli@gmail.com> Cc: davem@davemloft.net, andrew@lunn.ch, vivien.didelot@savoirfairelinux.com, jiri@mellanox.com, Florian Fainelli To: netdev@vger.kernel.org Return-path: Received: from mail-pf0-f196.google.com ([209.85.192.196]:36232 "EHLO mail-pf0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754449AbdA3UvJ (ORCPT ); Mon, 30 Jan 2017 15:51:09 -0500 Received: by mail-pf0-f196.google.com with SMTP id 19so24063016pfo.3 for ; Mon, 30 Jan 2017 12:51:09 -0800 (PST) In-Reply-To: <20170130204143.539-1-f.fainelli@gmail.com> Sender: netdev-owner@vger.kernel.org List-ID: Add definitions for the different Roboswitch registers relevant for ingress and egress mirroring. Signed-off-by: Florian Fainelli --- drivers/net/dsa/b53/b53_regs.h | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/net/dsa/b53/b53_regs.h b/drivers/net/dsa/b53/b53_regs.h index dac0af4e2cd0..9fd24c418fa4 100644 --- a/drivers/net/dsa/b53/b53_regs.h +++ b/drivers/net/dsa/b53/b53_regs.h @@ -206,6 +206,38 @@ #define BRCM_HDR_P8_EN BIT(0) /* Enable tagging on port 8 */ #define BRCM_HDR_P5_EN BIT(1) /* Enable tagging on port 5 */ +/* Mirror capture control register (16 bit) */ +#define B53_MIR_CAP_CTL 0x10 +#define CAP_PORT_MASK 0xf +#define BLK_NOT_MIR BIT(14) +#define MIRROR_EN BIT(15) + +/* Ingress mirror control register (16 bit) */ +#define B53_IG_MIR_CTL 0x12 +#define MIRROR_MASK 0x1ff +#define DIV_EN BIT(13) +#define MIRROR_FILTER_MASK 0x3 +#define MIRROR_FILTER_SHIFT 14 +#define MIRROR_ALL 0 +#define MIRROR_DA 1 +#define MIRROR_SA 2 + +/* Ingress mirror divider register (16 bit) */ +#define B53_IG_MIR_DIV 0x14 +#define IN_MIRROR_DIV_MASK 0x3ff + +/* Ingress mirror MAC address register (48 bit) */ +#define B53_IG_MIR_MAC 0x16 + +/* Egress mirror control register (16 bit) */ +#define B53_EG_MIR_CTL 0x1C + +/* Egress mirror divider register (16 bit) */ +#define B53_EG_MIR_DIV 0x1E + +/* Egress mirror MAC address register (48 bit) */ +#define B53_EG_MIR_MAC 0x20 + /* Device ID register (8 or 32 bit) */ #define B53_DEVICE_ID 0x30 -- 2.9.3