From: Andrew Lunn <andrew@lunn.ch>
To: l00371289 <linyunsheng@huawei.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>,
davem@davemloft.net, huangdaode@hisilicon.com,
xuwei5@hisilicon.com, liguozhu@hisilicon.com,
Yisen.Zhuang@huawei.com, gabriele.paoloni@huawei.com,
john.garry@huawei.com, linuxarm@huawei.com,
salil.mehta@huawei.com, lipeng321@huawei.com,
yankejian@huawei.com, tremyfr@gmail.com, xieqianqian@huawei.com,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH NET] net/hns:bugfix of ethtool -t phy self_test
Date: Tue, 20 Jun 2017 15:28:57 +0200 [thread overview]
Message-ID: <20170620132857.GE13704@lunn.ch> (raw)
In-Reply-To: <f526345d-b0a4-1c45-8472-81c6c548950c@huawei.com>
> >> The question really is, why is not this properly integrated into the PHY
> >> driver and PHYLIB such that the only thing the Ethernet MAC driver has
> >> to call is a function of the PHY driver putting it in self-test?
> >
> > This whole driver pokes various PHY registers, rather than use
> > phylib. And it does so without taking the PHY lock.
> I will consider using phylib as much as possible, thanks.
>
> It also assumes it
> > is a Marvell PHY and i don't see anywhere it actually verifies this.
> When it said Marvell Phy , I meant Marvell Phy with fibre support.
> I will send anther patch to only setting bit in Fiber Control when
> it is a Marvell Phy with fibre support.
There is a lot more broken than just that.
You really should remove all code which is accessing the PHY, and add
support to phylib and the drivers for what you need.
Andrew
next prev parent reply other threads:[~2017-06-20 13:28 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-16 9:24 [PATCH NET] net/hns:bugfix of ethtool -t phy self_test Lin Yun Sheng
2017-06-19 18:21 ` David Miller
2017-06-19 21:00 ` Florian Fainelli
2017-06-19 21:54 ` Andrew Lunn
2017-06-20 3:18 ` l00371289
2017-06-20 13:28 ` Andrew Lunn [this message]
2017-06-21 2:06 ` l00371289
2017-06-20 3:05 ` l00371289
2017-06-20 13:27 ` Andrew Lunn
2017-06-21 2:03 ` l00371289
2017-06-21 3:13 ` Andrew Lunn
2017-06-21 3:42 ` l00371289
2017-06-21 13:34 ` Andrew Lunn
2017-06-22 1:41 ` l00371289
2017-06-22 3:35 ` Andrew Lunn
2017-06-22 3:49 ` l00371289
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