From mboxrd@z Thu Jan 1 00:00:00 1970 From: Florian Fainelli Subject: [PATCH] net: dsa: bcm_sf2: Clear IDDQ_GLOBAL_PWR bit for PHY Date: Tue, 21 Nov 2017 17:37:14 -0800 Message-ID: <20171122013714.5568-1-f.fainelli@gmail.com> Cc: davem@davemloft.net, andrew@lunn.ch, vivien.didelot@savoirfairelinux.com, Florian Fainelli To: netdev@vger.kernel.org Return-path: Received: from mail-qk0-f194.google.com ([209.85.220.194]:47050 "EHLO mail-qk0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751401AbdKVBhT (ORCPT ); Tue, 21 Nov 2017 20:37:19 -0500 Received: by mail-qk0-f194.google.com with SMTP id b85so14765520qkc.13 for ; Tue, 21 Nov 2017 17:37:18 -0800 (PST) Sender: netdev-owner@vger.kernel.org List-ID: From: Florian Fainelli The PHY on BCM7278 has an additional bit that needs to be cleared: IDDQ_GLOBAL_PWR, without doing this, the PHY remains stuck in reset out of suspend/resume cycles. refs #SWLINUX-4599 Fixes: 1ad948be42b4 ("net: dsa: bcm_sf2: Add support for BCM7278 integrated switch") Signed-off-by: Florian Fainelli --- drivers/net/dsa/bcm_sf2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/dsa/bcm_sf2.c b/drivers/net/dsa/bcm_sf2.c index 09b48f9b4091..12b921d1c54b 100644 --- a/drivers/net/dsa/bcm_sf2.c +++ b/drivers/net/dsa/bcm_sf2.c @@ -214,7 +214,7 @@ static void bcm_sf2_gphy_enable_set(struct dsa_switch *ds, bool enable) reg = reg_readl(priv, REG_SPHY_CNTRL); if (enable) { reg |= PHY_RESET; - reg &= ~(EXT_PWR_DOWN | IDDQ_BIAS | CK25_DIS); + reg &= ~(EXT_PWR_DOWN | IDDQ_BIAS | IDDQ_GLOBAL_PWR | CK25_DIS); reg_writel(priv, reg, REG_SPHY_CNTRL); udelay(21); reg = reg_readl(priv, REG_SPHY_CNTRL); -- 2.14.3