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* [RfC net-next 0/3] RTL8211F Ethernet PHY "documentation"
@ 2017-12-02 22:06 Martin Blumenstingl
  2017-12-02 22:06 ` [RfC net-next 1/3] net: phy: realtek: add support for configuring the RX delay on RTL8211F Martin Blumenstingl
                   ` (3 more replies)
  0 siblings, 4 replies; 5+ messages in thread
From: Martin Blumenstingl @ 2017-12-02 22:06 UTC (permalink / raw)
  To: netdev
  Cc: f.fainelli, andrew, linux-amlogic, hkallweit1, Shengzhou.Liu,
	jaswinder.singh, Martin Blumenstingl

A recent patch from Heiner made me curious if the RTL8211F part of
the realtek.c PHY driver is correct: [0]
I contacted Realtek and asked if we could get a datasheet for the
RTL8211F PHY. it seems that the full datasheet can only be obtained
with an NDA. however, the contact at Realtek kindly answered all
questions I had regarding the RTL8211F PHY (thank you very much
again!). I am not permitted to share the exact answers I received,
but I am allowed to put them into my own words.

This series is a result of the conversation with Realtek: the main
intention behind this series is to *document* the information I got.
I am not aware of any board which needs the RX delay, has a problem
with the INTB pin configuration or requires any of the additional
interrupts.

I only tested that these patches don't break existing functionality
on Khadas VIM2 board with RTL8211F PHY.

PS: I also received information about the RTL8211E PHY's RX and TX
delay configuration. however, I don't understand that part of the
datasheet so I did not add any #defines in patch #3. the datasheet
says that:
- TX delay is configured through bit 12 and bit 13 in register 0x1c
  in page 0xa4 (value 1 = enabled, 0 = disabled)
- RX delay is configured through bit 11 and bit 13 in register 0x1c
  in page 0xa4 (value 1 = enabled, 0 = disabled)
I don't have any board with a RTL8211E PHY, so I could not test this
part at all. thus I don't know why bit 13 is listed for both, RX and
TX delay.

I do not expect that this series is applied. if someone is interested
in testing this: it applies on top of my other series:
"Realtek Ethernet PHY driver improvements" [1]


[0] https://www.spinics.net/lists/netdev/msg466661.html
[1] https://marc.info/?l=linux-netdev&m=151225151410593&w=2

Martin Blumenstingl (3):
  net: phy: realtek: add support for configuring the RX delay on
    RTL8211F
  net: phy: realtek: configure the INTB pin on RTL8211F
  net: phy: realtek: add more interrupt bits for RTL8211E and RTL8211F

 drivers/net/phy/realtek.c | 89 ++++++++++++++++++++++++++++++++++++++++-------
 1 file changed, 77 insertions(+), 12 deletions(-)

-- 
2.15.1

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [RfC net-next 1/3] net: phy: realtek: add support for configuring the RX delay on RTL8211F
  2017-12-02 22:06 [RfC net-next 0/3] RTL8211F Ethernet PHY "documentation" Martin Blumenstingl
@ 2017-12-02 22:06 ` Martin Blumenstingl
  2017-12-02 22:06 ` [RfC net-next 2/3] net: phy: realtek: configure the INTB pin " Martin Blumenstingl
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 5+ messages in thread
From: Martin Blumenstingl @ 2017-12-02 22:06 UTC (permalink / raw)
  To: netdev
  Cc: f.fainelli, andrew, linux-amlogic, hkallweit1, Shengzhou.Liu,
	jaswinder.singh, Martin Blumenstingl

On RTL8211F the RX delay can also be enabled/disabled.
The overall behavior of the RX delay is similar to the behavior of the
TX delay, which was already supported by the driver.

The RX delay (similar to the TX delay) may be enabled using hardware pin
strapping. If the MAC already configures the RX delay (if required) then
the RX delay generated by the RTL8211F PHY has to be turned off.

While here, update the comment regarding the TX delay why it has to be
enabled or disabled within the driver.
Also avoid code-duplication by extracting the code to mask/unmask bits
in a paged register into a new rtl8211x_page_mask_bits helper function.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 drivers/net/phy/realtek.c | 55 ++++++++++++++++++++++++++++++++++++++---------
 1 file changed, 45 insertions(+), 10 deletions(-)

diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index 5416ec5af042..d4e7f249a4bc 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -32,7 +32,10 @@
 
 #define RTL8211F_INSR				0x1d
 
-#define RTL8211F_TX_DELAY			BIT(8)
+#define RTL8211F_RX_DELAY_REG			0x15
+#define RTL8211F_RX_DELAY_EN			BIT(3)
+#define RTL8211F_TX_DELAY_REG			0x11
+#define RTL8211F_TX_DELAY_EN			BIT(8)
 
 #define RTL8201F_ISR				0x1e
 #define RTL8201F_IER				0x13
@@ -74,6 +77,23 @@ static int rtl8211x_page_write(struct phy_device *phydev, u16 page,
 	return ret;
 }
 
+static int rtl8211x_page_mask_bits(struct phy_device *phydev, u16 page,
+				   u16 address, u16 mask, u16 set)
+{
+	int ret;
+	u16 val;
+
+	ret = rtl8211x_page_read(phydev, page, address);
+	if (ret < 0)
+		return ret;
+
+	val = ret & 0xffff;
+	val &= ~mask;
+	val |= (set & mask);
+
+	return rtl8211x_page_write(phydev, page, address, val);
+}
+
 static int rtl8201_ack_interrupt(struct phy_device *phydev)
 {
 	int err;
@@ -160,20 +180,35 @@ static int rtl8211f_config_init(struct phy_device *phydev)
 	if (ret < 0)
 		return ret;
 
-	ret = rtl8211x_page_read(phydev, 0xd08, 0x11);
-	if (ret < 0)
-		return ret;
+	/*
+	 * enable TX-delay for rgmii-id and rgmii-txid, otherwise disable it.
+	 * this is needed because it can be enabled by pin strapping and
+	 * conflict with the TX-delay configured by the MAC.
+	 */
+	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
+	    phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
+		val = RTL8211F_TX_DELAY_EN;
+	else
+		val = 0;
 
-	val = ret & 0xffff;
+	ret = rtl8211x_page_mask_bits(phydev, 0xd08, RTL8211F_TX_DELAY_REG,
+				      RTL8211F_TX_DELAY_EN, val);
+	if (ret)
+		return ret;
 
-	/* enable TX-delay for rgmii-id and rgmii-txid, otherwise disable it */
+	/*
+	 * enable RX-delay for rgmii-id and rgmii-rxid, otherwise disable it.
+	 * this is needed because it can be enabled by pin strapping and
+	 * conflict with the RX-delay configured by the MAC.
+	 */
 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
-	    phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
-		val |= RTL8211F_TX_DELAY;
+	    phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
+		val = RTL8211F_RX_DELAY_EN;
 	else
-		val &= ~RTL8211F_TX_DELAY;
+		val = 0;
 
-	ret = rtl8211x_page_write(phydev, 0xd08, 0x11, val);
+	ret = rtl8211x_page_mask_bits(phydev, 0xd08, RTL8211F_RX_DELAY_REG,
+				      RTL8211F_RX_DELAY_EN, val);
 	if (ret)
 		return ret;
 
-- 
2.15.1

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [RfC net-next 2/3] net: phy: realtek: configure the INTB pin on RTL8211F
  2017-12-02 22:06 [RfC net-next 0/3] RTL8211F Ethernet PHY "documentation" Martin Blumenstingl
  2017-12-02 22:06 ` [RfC net-next 1/3] net: phy: realtek: add support for configuring the RX delay on RTL8211F Martin Blumenstingl
@ 2017-12-02 22:06 ` Martin Blumenstingl
  2017-12-02 22:06 ` [RfC net-next 3/3] net: phy: realtek: add more interrupt bits for RTL8211E and RTL8211F Martin Blumenstingl
  2017-12-05 22:30 ` [RfC net-next 0/3] RTL8211F Ethernet PHY "documentation" Andrew Lunn
  3 siblings, 0 replies; 5+ messages in thread
From: Martin Blumenstingl @ 2017-12-02 22:06 UTC (permalink / raw)
  To: netdev
  Cc: f.fainelli, andrew, linux-amlogic, hkallweit1, Shengzhou.Liu,
	jaswinder.singh, Martin Blumenstingl

The interrupt pin on the RTL8211F PHY can be used in two different
modes:
INTB
- the default mode of the PHY
- interrupts can be configured through page 0xa42 register RTL821x_INER
- interrupts can be ACK'ed through RTL8211F_INSR
- it acts as a level-interrupt which is active low
- Wake-on-LAN "wakeup" status is available in RTL8211F_INSR bit 7

PMEB:
- special mode for Wake-on-LAN
- interrupts configured through page 0xa42 register RTL821x_INER are
  disabled
- it supports a "pulse low" waveform for the interrupt

For now we simply force the pin into INTB mode since the PHY driver does
not support Wake-on-LAN yet.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 drivers/net/phy/realtek.c | 27 +++++++++++++++++++++++++--
 1 file changed, 25 insertions(+), 2 deletions(-)

diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index d4e7f249a4bc..961165d128d6 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -40,6 +40,9 @@
 #define RTL8201F_ISR				0x1e
 #define RTL8201F_IER				0x13
 
+#define RTL8211F_INTBCR				0x16
+#define RTL8211F_INTBCR_INTB_PMEB		BIT(5)
+
 MODULE_DESCRIPTION("Realtek PHY driver");
 MODULE_AUTHOR("Johnson Leung");
 MODULE_LICENSE("GPL");
@@ -161,12 +164,32 @@ static int rtl8211e_config_intr(struct phy_device *phydev)
 
 static int rtl8211f_config_intr(struct phy_device *phydev)
 {
+	int err;
 	u16 val;
 
-	if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
+	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
+		/*
+		 * The interrupt pin has two functions:
+		 * 0: INTB: it acts as interrupt pin which can be configured
+		 *    through RTL821x_INER and the status can be read through
+		 *    RTL8211F_INSR
+		 * 1: PMEB: a special "Power Management Event" mode for
+		 *    Wake-on-LAN operation (with support for a "pulse low"
+		 *    wave format). Interrupts configured through RTL821x_INER
+		 *    will not work in this mode
+		 *
+		 * select INTB mode in the "INTB pin control" register to
+		 * ensure that the interrupt pin is in the correct mode.
+		 */
+		err = rtl8211x_page_mask_bits(phydev, 0xd40, RTL8211F_INTBCR,
+					      RTL8211F_INTBCR_INTB_PMEB, 0);
+		if (err)
+			return err;
+
 		val = RTL8211F_INER_LINK_STATUS;
-	else
+	} else {
 		val = 0;
+	}
 
 	return rtl8211x_page_write(phydev, 0xa42, RTL821x_INER, val);
 }
-- 
2.15.1

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [RfC net-next 3/3] net: phy: realtek: add more interrupt bits for RTL8211E and RTL8211F
  2017-12-02 22:06 [RfC net-next 0/3] RTL8211F Ethernet PHY "documentation" Martin Blumenstingl
  2017-12-02 22:06 ` [RfC net-next 1/3] net: phy: realtek: add support for configuring the RX delay on RTL8211F Martin Blumenstingl
  2017-12-02 22:06 ` [RfC net-next 2/3] net: phy: realtek: configure the INTB pin " Martin Blumenstingl
@ 2017-12-02 22:06 ` Martin Blumenstingl
  2017-12-05 22:30 ` [RfC net-next 0/3] RTL8211F Ethernet PHY "documentation" Andrew Lunn
  3 siblings, 0 replies; 5+ messages in thread
From: Martin Blumenstingl @ 2017-12-02 22:06 UTC (permalink / raw)
  To: netdev
  Cc: f.fainelli, andrew, linux-amlogic, hkallweit1, Shengzhou.Liu,
	jaswinder.singh, Martin Blumenstingl

This documents a few more bits in the RTL821x_INER register for RTL8211E
and RTL8211F. These are added only to document them (as no public
datasheets are available for these PHYs), they are currently not used.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 drivers/net/phy/realtek.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index 961165d128d6..a793c35cbaae 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -24,7 +24,14 @@
 #define RTL821x_INER				0x12
 #define RTL8211B_INER_INIT			0x6400
 #define RTL8211E_INER_LINK_STATUS		BIT(10)
+#define RTL8211E_INER_ANEG_COMPLETED		BIT(11)
+#define RTL8211E_INER_PAGE_RECEIVED		BIT(12)
+#define RTL8211E_INER_ANEG_ERROR		BIT(15)
 #define RTL8211F_INER_LINK_STATUS		BIT(4)
+#define RTL8211F_INER_PHY_REGISTER_ACCESSIBLE	BIT(5)
+#define RTL8211F_INER_WOL_PME			BIT(7)
+#define RTL8211F_INER_ALDPS_STATE_CHANGE	BIT(9)
+#define RTL8211F_INER_JABBER			BIT(10)
 
 #define RTL821x_INSR				0x13
 
-- 
2.15.1

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [RfC net-next 0/3] RTL8211F Ethernet PHY "documentation"
  2017-12-02 22:06 [RfC net-next 0/3] RTL8211F Ethernet PHY "documentation" Martin Blumenstingl
                   ` (2 preceding siblings ...)
  2017-12-02 22:06 ` [RfC net-next 3/3] net: phy: realtek: add more interrupt bits for RTL8211E and RTL8211F Martin Blumenstingl
@ 2017-12-05 22:30 ` Andrew Lunn
  3 siblings, 0 replies; 5+ messages in thread
From: Andrew Lunn @ 2017-12-05 22:30 UTC (permalink / raw)
  To: Martin Blumenstingl
  Cc: netdev, f.fainelli, linux-amlogic, hkallweit1, Shengzhou.Liu,
	jaswinder.singh

> I do not expect that this series is applied. if someone is interested
> in testing this: it applies on top of my other series:
> "Realtek Ethernet PHY driver improvements" [1]

Hi Martin

Thanks for the patches. Documentation like this is often useful.

       Andrew

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2017-12-05 22:30 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-12-02 22:06 [RfC net-next 0/3] RTL8211F Ethernet PHY "documentation" Martin Blumenstingl
2017-12-02 22:06 ` [RfC net-next 1/3] net: phy: realtek: add support for configuring the RX delay on RTL8211F Martin Blumenstingl
2017-12-02 22:06 ` [RfC net-next 2/3] net: phy: realtek: configure the INTB pin " Martin Blumenstingl
2017-12-02 22:06 ` [RfC net-next 3/3] net: phy: realtek: add more interrupt bits for RTL8211E and RTL8211F Martin Blumenstingl
2017-12-05 22:30 ` [RfC net-next 0/3] RTL8211F Ethernet PHY "documentation" Andrew Lunn

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