[PATCH 1/2] net: fec: don't ack masked interrupt events

[PATCH 1/2] net: fec: don't ack masked interrupt events

[Lucas Stach]

The FEC doesn't have a real interrupt status register, that takes
into account the mask status of the IRQ. The driver reads the raw
interrupt event register, which also reports events for masked
IRQs.

The driver needs to apply the current mask itself, to avoid acking
IRQs that are currently masked, as NAPI relies on the masking to
hide the IRQs. The current behavior of just acking all interrupts
regardless of their mask status opens the driver up the "rotting
packet" race-window, as described in the original NAPI-HOWTO, which
has been observed in the wild.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/net/ethernet/freescale/fec_main.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/freescale/fec_main.c b/drivers/net/ethernet/freescale/fec_main.c
index 610573855213..0b70c07eb703 100644
--- a/drivers/net/ethernet/freescale/fec_main.c
+++ b/drivers/net/ethernet/freescale/fec_main.c
@@ -1584,7 +1584,8 @@ fec_enet_interrupt(int irq, void *dev_id)
 	uint int_events;
 	irqreturn_t ret = IRQ_NONE;
 
-	int_events = readl(fep->hwp + FEC_IEVENT);
+	int_events = readl_relaxed(fep->hwp + FEC_IEVENT) &
+	             readl_relaxed(fep->hwp + FEC_IMASK);
 	writel(int_events, fep->hwp + FEC_IEVENT);
 	fec_enet_collect_events(fep, int_events);
 
-- 
2.11.0

[PATCH 2/2] net: fec: optimize IRQ handler

[Lucas Stach]

fep->work_rx and fep->work_tx are both non-zero, as long as the NAPI
softirq hasn't finished its work. So if the current IRQ does not
signal any RX or TX completion, but some unrelated event, the path to
schedule the NAPI context is still entered.

The handler works correctly as in this case napi_schedule_prep() will
reject the scheduling attempt, but the flow can still be optimized by
not trying to schedule if the IRQ doesn't signal RX or TX completion.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/net/ethernet/freescale/fec_main.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/freescale/fec_main.c b/drivers/net/ethernet/freescale/fec_main.c
index 0b70c07eb703..2043e140e9bd 100644
--- a/drivers/net/ethernet/freescale/fec_main.c
+++ b/drivers/net/ethernet/freescale/fec_main.c
@@ -1587,14 +1587,14 @@ fec_enet_interrupt(int irq, void *dev_id)
 	int_events = readl_relaxed(fep->hwp + FEC_IEVENT) &
 	             readl_relaxed(fep->hwp + FEC_IMASK);
 	writel(int_events, fep->hwp + FEC_IEVENT);
-	fec_enet_collect_events(fep, int_events);
 
-	if ((fep->work_tx || fep->work_rx) && fep->link) {
+	if ((int_events & (FEC_ENET_RXF | FEC_ENET_TXF)) && fep->link) {
 		ret = IRQ_HANDLED;
 
 		if (napi_schedule_prep(&fep->napi)) {
 			/* Disable the NAPI interrupts */
 			writel(FEC_NAPI_IMASK, fep->hwp + FEC_IMASK);
+			fec_enet_collect_events(fep, int_events);
 			__napi_schedule(&fep->napi);
 		}
 	}
-- 
2.11.0

RE: [PATCH 2/2] net: fec: optimize IRQ handler

[Andy Duan]

From: Lucas Stach <l.stach@pengutronix.de> Sent: Thursday, December 07, 2017 1:25 AM
>fep->work_rx and fep->work_tx are both non-zero, as long as the NAPI
>softirq hasn't finished its work. So if the current IRQ does not signal any RX or
>TX completion, but some unrelated event, the path to schedule the NAPI
>context is still entered.
>
>The handler works correctly as in this case napi_schedule_prep() will reject
>the scheduling attempt, but the flow can still be optimized by not trying to
>schedule if the IRQ doesn't signal RX or TX completion.
>
>Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
>---
> drivers/net/ethernet/freescale/fec_main.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/net/ethernet/freescale/fec_main.c
>b/drivers/net/ethernet/freescale/fec_main.c
>index 0b70c07eb703..2043e140e9bd 100644
>--- a/drivers/net/ethernet/freescale/fec_main.c
>+++ b/drivers/net/ethernet/freescale/fec_main.c
>@@ -1587,14 +1587,14 @@ fec_enet_interrupt(int irq, void *dev_id)
> 	int_events = readl_relaxed(fep->hwp + FEC_IEVENT) &
> 	             readl_relaxed(fep->hwp + FEC_IMASK);
> 	writel(int_events, fep->hwp + FEC_IEVENT);
>-	fec_enet_collect_events(fep, int_events);
>
>-	if ((fep->work_tx || fep->work_rx) && fep->link) {
>+	if ((int_events & (FEC_ENET_RXF | FEC_ENET_TXF)) && fep->link) {
> 		ret = IRQ_HANDLED;
>
> 		if (napi_schedule_prep(&fep->napi)) {
> 			/* Disable the NAPI interrupts */
> 			writel(FEC_NAPI_IMASK, fep->hwp + FEC_IMASK);
>+			fec_enet_collect_events(fep, int_events);
> 			__napi_schedule(&fep->napi);
> 		}
> 	}
>--
>2.11.0

The patch seems fine, and patch#1 is better to cache imask as David's comment.  
Thanks.

Acked-by: Fugang Duan <fugang.duan@nxp.com>

Re: [PATCH 1/2] net: fec: don't ack masked interrupt events

[David Miller]

From: Lucas Stach <l.stach@pengutronix.de>
Date: Wed,  6 Dec 2017 18:24:58 +0100

> The FEC doesn't have a real interrupt status register, that takes
> into account the mask status of the IRQ. The driver reads the raw
> interrupt event register, which also reports events for masked
> IRQs.
> 
> The driver needs to apply the current mask itself, to avoid acking
> IRQs that are currently masked, as NAPI relies on the masking to
> hide the IRQs. The current behavior of just acking all interrupts
> regardless of their mask status opens the driver up the "rotting
> packet" race-window, as described in the original NAPI-HOWTO, which
> has been observed in the wild.
> 
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---
>  drivers/net/ethernet/freescale/fec_main.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/net/ethernet/freescale/fec_main.c b/drivers/net/ethernet/freescale/fec_main.c
> index 610573855213..0b70c07eb703 100644
> --- a/drivers/net/ethernet/freescale/fec_main.c
> +++ b/drivers/net/ethernet/freescale/fec_main.c
> @@ -1584,7 +1584,8 @@ fec_enet_interrupt(int irq, void *dev_id)
>  	uint int_events;
>  	irqreturn_t ret = IRQ_NONE;
>  
> -	int_events = readl(fep->hwp + FEC_IEVENT);
> +	int_events = readl_relaxed(fep->hwp + FEC_IEVENT) &
> +	             readl_relaxed(fep->hwp + FEC_IMASK);

Adding a full new MMIO register read to every interrupt is going to make
interrupts significantly more expensive.

You should cache this mask in software in order to avoid the expensive
MMIO read.

Thanks.