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From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: netdev@vger.kernel.org, ingrassia@epigenesys.com
Cc: linus.luessing@c0d3.blue, khilman@baylibre.com,
	linux-amlogic@lists.infradead.org, jbrunet@baylibre.com,
	narmstrong@baylibre.com, peppe.cavallaro@st.com,
	alexandre.torgue@st.com,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Subject: [RFT net-next v2 0/3] dwmac-meson8b: RGMII clock fixes for Meson8b
Date: Sun, 24 Dec 2017 00:40:57 +0100	[thread overview]
Message-ID: <20171223234100.11814-1-martin.blumenstingl@googlemail.com> (raw)

Hi Dave,

please do not apply this series until it got a Tested-by from Emiliano.


Hi Emiliano,

you reported [0] that you couldn't get dwmac-meson8b to work on your
Odroid-C1. With your findings (register dumps, clk_summary output, etc.)
I think I was able to find a fix: it consists of two patches (which you
find in this series)

Unfortunately I don't have any Meson8b boards with RGMII PHY so I could
only partially test this (I could only check if the clocks were
calculated correctly when using a dummy 500002394Hz input clock instead
of MPLL2).

Could you please give this series a try and let me know about the
results?
You obviously still need your two "ARM: dts: meson8b" patches which
- add the amlogic,meson8b-dwmac" compatible to meson8b.dtsi
- enable Ethernet on the Odroid-C1

I have tested this myself on a Khadas VIM (GXL SoC, internal RMII PHY)
and a Khadas VIM2 (GXM SoC, external RGMII PHY). Both are still working
fine (so let's hope that this also fixes your Meson8b issue :)).


changes since v1 at [1]:
- changed the subject of the cover-letter to indicate that this is all
  about the RGMII clock
- added PATCH #1 which ensures that we don't unnecessarily change the
  parent clocks in RMII mode (and also makes the code easier to
  understand)
- changed subject of PATCH #2 (formerly PATCH #1) to state that this
  is about the RGMII clock
- added Jerome's Reviewed-by to PATCH #2 (formerly PATCH #1)
- replaced PATCH #3 (formerly PATCH #2) with one that sets
  CLK_SET_RATE_PARENT on the mux and thus re-configures the MPLL2 clock
  on Meson8b correctly


[0] http://lists.infradead.org/pipermail/linux-amlogic/2017-December/005596.html
[1] http://lists.infradead.org/pipermail/linux-amlogic/2017-December/005848.html


Martin Blumenstingl (3):
  net: stmmac: dwmac-meson8b: only configure the clocks in RGMII mode
  net: stmmac: dwmac-meson8b: fix setting the RGMII clock on Meson8b
  net: stmmac: dwmac-meson8b: propagate rate changes to the parent clock

 .../net/ethernet/stmicro/stmmac/dwmac-meson8b.c    | 55 +++++++++++-----------
 1 file changed, 27 insertions(+), 28 deletions(-)

-- 
2.15.1

             reply	other threads:[~2017-12-23 23:41 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-23 23:40 Martin Blumenstingl [this message]
2017-12-23 23:40 ` [RFT net-next v2 1/3] net: stmmac: dwmac-meson8b: only configure the clocks in RGMII mode Martin Blumenstingl
2017-12-23 23:40 ` [RFT net-next v2 2/3] net: stmmac: dwmac-meson8b: fix setting the RGMII clock on Meson8b Martin Blumenstingl
2017-12-23 23:41 ` [RFT net-next v2 3/3] net: stmmac: dwmac-meson8b: propagate rate changes to the parent clock Martin Blumenstingl
2017-12-28 16:16 ` [RFT net-next v2 0/3] dwmac-meson8b: RGMII clock fixes for Meson8b Emiliano Ingrassia
2017-12-28 16:58   ` Martin Blumenstingl
2017-12-28 17:51     ` Emiliano Ingrassia
2017-12-28 19:28       ` Martin Blumenstingl

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