* [PATCH v2 2/2] net/ibm/emac: wrong bit is used for STA control register write
@ 2018-01-23 16:48 Ivan Mikhaylov
2018-01-23 16:58 ` David Miller
0 siblings, 1 reply; 4+ messages in thread
From: Ivan Mikhaylov @ 2018-01-23 16:48 UTC (permalink / raw)
To: David S . Miller, Christian Lamparter, Rob Herring; +Cc: netdev, linux-kernel
STA control register has areas of mode and opcodes for opeations. 18 bit is
using for mode selection, where 0 is old MIO/MDIO access method and 1 is
indirect access mode. 19-20 bits are using for setting up read/write
operation(STA opcodes). In current state 'read' is set into old MIO/MDIO mode
with 19 bit and write operation is set into 18 bit which is mode selection,
not a write operation. To correlate write with read we set it into 20 bit.
All those bit operations are MSB 0 based.
Signed-off-by: Ivan Mikhaylov <ivan@de.ibm.com>
---
drivers/net/ethernet/ibm/emac/emac.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/net/ethernet/ibm/emac/emac.h b/drivers/net/ethernet/ibm/emac/emac.h
index d0a0e3b..c26d263 100644
--- a/drivers/net/ethernet/ibm/emac/emac.h
+++ b/drivers/net/ethernet/ibm/emac/emac.h
@@ -244,7 +244,7 @@ struct emac_regs {
#define EMAC_STACR_PHYE 0x00004000
#define EMAC_STACR_STAC_MASK 0x00003000
#define EMAC_STACR_STAC_READ 0x00001000
-#define EMAC_STACR_STAC_WRITE 0x00002000
+#define EMAC_STACR_STAC_WRITE 0x00000800
#define EMAC_STACR_OPBC_MASK 0x00000C00
#define EMAC_STACR_OPBC_50 0x00000000
#define EMAC_STACR_OPBC_66 0x00000400
--
1.7.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v2 2/2] net/ibm/emac: wrong bit is used for STA control register write
2018-01-23 16:48 [PATCH v2 2/2] net/ibm/emac: wrong bit is used for STA control register write Ivan Mikhaylov
@ 2018-01-23 16:58 ` David Miller
0 siblings, 0 replies; 4+ messages in thread
From: David Miller @ 2018-01-23 16:58 UTC (permalink / raw)
To: ivan; +Cc: chunkeey, robh, netdev, linux-kernel
When posting a new version of a patch which is part of a series,
you must always repost the entire series not just the patches
which change.
Thank you.
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v2 2/2] net/ibm/emac: wrong bit is used for STA control register write
@ 2018-01-24 12:53 Ivan Mikhaylov
2018-01-24 23:11 ` David Miller
0 siblings, 1 reply; 4+ messages in thread
From: Ivan Mikhaylov @ 2018-01-24 12:53 UTC (permalink / raw)
To: David S . Miller, Christian Lamparter, Rob Herring; +Cc: netdev, linux-kernel
STA control register has areas of mode and opcodes for opeations. 18 bit is
using for mode selection, where 0 is old MIO/MDIO access method and 1 is
indirect access mode. 19-20 bits are using for setting up read/write
operation(STA opcodes). In current state 'read' is set into old MIO/MDIO mode
with 19 bit and write operation is set into 18 bit which is mode selection,
not a write operation. To correlate write with read we set it into 20 bit.
All those bit operations are MSB 0 based.
Signed-off-by: Ivan Mikhaylov <ivan@de.ibm.com>
---
drivers/net/ethernet/ibm/emac/emac.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/net/ethernet/ibm/emac/emac.h b/drivers/net/ethernet/ibm/emac/emac.h
index d0a0e3b..c26d263 100644
--- a/drivers/net/ethernet/ibm/emac/emac.h
+++ b/drivers/net/ethernet/ibm/emac/emac.h
@@ -244,7 +244,7 @@ struct emac_regs {
#define EMAC_STACR_PHYE 0x00004000
#define EMAC_STACR_STAC_MASK 0x00003000
#define EMAC_STACR_STAC_READ 0x00001000
-#define EMAC_STACR_STAC_WRITE 0x00002000
+#define EMAC_STACR_STAC_WRITE 0x00000800
#define EMAC_STACR_OPBC_MASK 0x00000C00
#define EMAC_STACR_OPBC_50 0x00000000
#define EMAC_STACR_OPBC_66 0x00000400
--
1.7.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v2 2/2] net/ibm/emac: wrong bit is used for STA control register write
2018-01-24 12:53 Ivan Mikhaylov
@ 2018-01-24 23:11 ` David Miller
0 siblings, 0 replies; 4+ messages in thread
From: David Miller @ 2018-01-24 23:11 UTC (permalink / raw)
To: ivan; +Cc: chunkeey, robh, netdev, linux-kernel
From: Ivan Mikhaylov <ivan@de.ibm.com>
Date: Wed, 24 Jan 2018 15:53:25 +0300
> STA control register has areas of mode and opcodes for opeations. 18 bit is
> using for mode selection, where 0 is old MIO/MDIO access method and 1 is
> indirect access mode. 19-20 bits are using for setting up read/write
> operation(STA opcodes). In current state 'read' is set into old MIO/MDIO mode
> with 19 bit and write operation is set into 18 bit which is mode selection,
> not a write operation. To correlate write with read we set it into 20 bit.
> All those bit operations are MSB 0 based.
>
> Signed-off-by: Ivan Mikhaylov <ivan@de.ibm.com>
Applied.
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2018-01-24 23:11 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-01-23 16:48 [PATCH v2 2/2] net/ibm/emac: wrong bit is used for STA control register write Ivan Mikhaylov
2018-01-23 16:58 ` David Miller
-- strict thread matches above, loose matches on Subject: below --
2018-01-24 12:53 Ivan Mikhaylov
2018-01-24 23:11 ` David Miller
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).