From mboxrd@z Thu Jan 1 00:00:00 1970 From: David Miller Subject: Re: [PATCH v2 2/2] net/ibm/emac: wrong bit is used for STA control register write Date: Wed, 24 Jan 2018 18:11:26 -0500 (EST) Message-ID: <20180124.181126.1573479768859874669.davem@davemloft.net> References: <20180124125325.56824-2-ivan@de.ibm.com> Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Cc: chunkeey@googlemail.com, robh@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org To: ivan@de.ibm.com Return-path: In-Reply-To: <20180124125325.56824-2-ivan@de.ibm.com> Sender: linux-kernel-owner@vger.kernel.org List-Id: netdev.vger.kernel.org From: Ivan Mikhaylov Date: Wed, 24 Jan 2018 15:53:25 +0300 > STA control register has areas of mode and opcodes for opeations. 18 bit is > using for mode selection, where 0 is old MIO/MDIO access method and 1 is > indirect access mode. 19-20 bits are using for setting up read/write > operation(STA opcodes). In current state 'read' is set into old MIO/MDIO mode > with 19 bit and write operation is set into 18 bit which is mode selection, > not a write operation. To correlate write with read we set it into 20 bit. > All those bit operations are MSB 0 based. > > Signed-off-by: Ivan Mikhaylov Applied.