From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wang YanQing Subject: [PATCH] bpf, doc: Correct one wrong value in "Register value tracking" Date: Wed, 24 Jan 2018 15:48:26 +0800 Message-ID: <20180124074826.GA14229@udknight> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: ast@kernel.org, daniel@iogearbox.net, netdev@vger.kernel.org, linux-kernel@vger.kernel.org To: davem@davemloft.net Return-path: Received: from mail-pf0-f196.google.com ([209.85.192.196]:44110 "EHLO mail-pf0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933305AbeAXNIx (ORCPT ); Wed, 24 Jan 2018 08:08:53 -0500 Content-Disposition: inline Sender: netdev-owner@vger.kernel.org List-ID: If we then OR this with 0x40, then the value of 6th bit (0th is first bit) become known, so the right mask is 0xbf instead of 0xcf. Signed-off-by: Wang YanQing --- Documentation/networking/filter.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/networking/filter.txt b/Documentation/networking/filter.txt index 8781485..a4508ec 100644 --- a/Documentation/networking/filter.txt +++ b/Documentation/networking/filter.txt @@ -1134,7 +1134,7 @@ The verifier's knowledge about the variable offset consists of: mask and value; no bit should ever be 1 in both. For example, if a byte is read into a register from memory, the register's top 56 bits are known zero, while the low 8 are unknown - which is represented as the tnum (0x0; 0xff). If we -then OR this with 0x40, we get (0x40; 0xcf), then if we add 1 we get (0x0; +then OR this with 0x40, we get (0x40; 0xbf), then if we add 1 we get (0x0; 0x1ff), because of potential carries. Besides arithmetic, the register state can also be updated by conditional branches. For instance, if a SCALAR_VALUE is compared > 8, in the 'true' branch -- 1.8.5.6.2.g3d8a54e.dirty