Re: [PATCH net-next] net: stmmac: remove superfluous wmb() memory barriers

[Niklas Cassel <niklas.cassel@axis.com>]

On Fri, Mar 09, 2018 at 10:15:20AM -0500, David Miller wrote:
> From: Jose Abreu <Jose.Abreu@synopsys.com>
> Date: Fri, 9 Mar 2018 10:26:11 +0000
> 
> > Sorry but I know at least two architectures which don't do a
> > wmb() upon an writel [1] [2]. This can be critical if if we are
> > accessing the device through some slow or filled bus which will
> > delay accesses to the device IO. Notice that writel and then
> > readl to the same address will force CPU to wait for writel
> > completion before readl, but in this case we are using DMA and
> > then writel so I think a wmb() before the writel is a safe measure.
> 
> Wait a second.
> 
> This is not about whether there is an explicit memory barrier
> instruction placed in the writel() implementation.
> 
> Are you saying that the cpu(s) in question will reorder stores in
> their store buffers, even if they are to real memory vs. IOMEM?
> 
> That's really dangerous.

Hello David,

Jose is simply responding to the commit message description of this patch.

You explained that there is an implicit memory barrier between physical memory
writes and those to MMIO register space, as long as you used writel().

I assumed that you meant writel() vs writel_relaxed(), where there latter
does not do an implicit barrier.

I also found this from you:
https://lwn.net/Articles/198995/

If my assumption was incorrect, please correct me.

As you seem to possess knowledge regarding this, you are probably the most
suited person to know if this patch simply needs a commit message rewrite,
or if it should be dropped completely.


Best regards,
Niklas