From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jisheng Zhang Subject: Re: [PATCH] net: phy: marvell: clear wol event before setting it Date: Fri, 27 Apr 2018 15:25:55 +0800 Message-ID: <20180427152555.5e8efb9c@xhacker.debian> References: <20180419160232.519d15be@xhacker.debian> <20180419121801.GC17888@lunn.ch> <4273f766-a017-b336-7d14-a28901d274b9@nvidia.com> <20180426141508.6660a633@xhacker.debian> <73e21c83-f78a-8b22-a421-f179ef6adef1@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Cc: Andrew Lunn , Florian Fainelli , "David S. Miller" , , , Jingju Hou To: Bhadram Varka Return-path: In-Reply-To: <73e21c83-f78a-8b22-a421-f179ef6adef1@nvidia.com> Sender: linux-kernel-owner@vger.kernel.org List-Id: netdev.vger.kernel.org On Thu, 26 Apr 2018 12:39:59 +0530 Bhadram Varka wrote: > >>>>> > >>>>> diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c > >>>>> index c22e8e383247..b6abe1cbc84b 100644 > >>>>> --- a/drivers/net/phy/marvell.c > >>>>> +++ b/drivers/net/phy/marvell.c > >>>>> @@ -115,6 +115,9 @@ > >>>>> =C2=A0=C2=A0 /* WOL Event Interrupt Enable */ > >>>>> =C2=A0=C2=A0 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) > >>>>> =C2=A0=C2=A0 +/* Copper Specific Interrupt Status Register */ > >>>>> +#define MII_88E1318S_PHY_CSISR=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 0x13 > >>>>> + > >>>>> =C2=A0=C2=A0 /* LED Timer Control Register */ > >>>>> =C2=A0=C2=A0 #define MII_88E1318S_PHY_LED_TCR=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 0x12 > >>>>> =C2=A0=C2=A0 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) > >>>>> @@ -1393,6 +1396,12 @@ static int m88e1318_set_wol(struct=20 > >>>>> phy_device *phydev, > >>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (er= r < 0) > >>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0 goto error; > >>>>> =C2=A0=C2=A0 +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 /* If WOL = event happened once, the LED[2] interrupt pin > >>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 * will not be cle= ared unless reading the CSISR register. > >>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 * So clear the WO= L event first before enabling it. > >>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 */ > >>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 phy_read(phydev, MII_88= E1318S_PHY_CSISR); > >>>>> + =20 > >>>> Hi Jisheng > >>>> > >>>> The problem with this is, you could be clearing a real interrupt, li= nk > >>>> down/up etc. If interrupts are in use, i think the normal interrupt > >>>> handling will clear the WOL interrupt? So can you make this read > >>>> conditional on !phy_interrupt_is_valid()? =20 > >>> So this will clear WoL interrupt bit from Copper Interrupt status=20 > >>> register. > >>> > >>> How about clearing WoL status (Page 17, register 17) for every WOL=20 > >>> event ? > >>> =20 > >> This is already properly done by setting=20 > >> MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS > >> in m88e1318_set_wol() =20 > > This part of the code executes only when we enable WOL through ethtool= =20 > > (ethtool -s eth0 wol g) > > > > Lets say once WOL enabled through magic packet - HW generates WOL=20 > > interrupt once magic packet received. > > The problem that I see here is that for the next immediate magic=20 > > packet I don't see WOL interrupt generated by the HW. > > I need to explicitly clear WOL status for HW to generate WOL interrupt.= =20 >=20 > With the below patch I see WOL event interrupt for every magic packet=20 > that HW receives... >=20 > diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c > index ed8a67d..5d3d138 100644 > --- a/drivers/net/phy/marvell.c > +++ b/drivers/net/phy/marvell.c > @@ -55,6 +55,7 @@ >=20 > =C2=A0#define MII_M1011_IEVENT=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 0x13 > =C2=A0#define MII_M1011_IEVENT_CLEAR=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0 0x0000 > +#define MII_M1011_IEVENT_WOL_EVENT=C2=A0=C2=A0=C2=A0=C2=A0 BIT(7) >=20 > =C2=A0#define MII_M1011_IMASK=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0 0x12 > - #define MII_M1011_IMASK_INIT=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0 0x6400 > + #define MII_M1011_IMASK_INIT=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0 0x6480 >=20 > @@ -195,13 +196,40 @@ struct marvell_priv { > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 bool copper; > =C2=A0}; >=20 > +static int marvell_clear_wol_status(struct phy_device *phydev) > +{ > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int err, temp, oldpage; > + > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 oldpage =3D phy_read(phydev, MII_MA= RVELL_PHY_PAGE); > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (oldpage < 0) > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0 return oldpage; > + > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 err =3D phy_write(phydev, MII_MARVE= LL_PHY_PAGE, > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 MII_88E1= 318S_PHY_WOL_PAGE); > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (err < 0) > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0 return err; > + > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 /* > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 * Clear WOL status so that fo= r next WOL event > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 * interrupt will be generated= by HW > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 */ > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 temp =3D phy_read(phydev, MII_88E13= 18S_PHY_WOL_CTRL); > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 temp |=3D MII_88E1318S_PHY_WOL_CTRL= _CLEAR_WOL_STATUS; > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 err =3D phy_write(phydev, MII_88E13= 18S_PHY_WOL_CTRL, temp); is it better to reuse __phy_write()? > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (err < 0) > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0 return err; > + > + > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 phy_write(phydev, MII_MARVELL_PHY_P= AGE, oldpage); > + > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return 0; > +} > + > =C2=A0static int marvell_ack_interrupt(struct phy_device *phydev) > =C2=A0{ > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int err; >=20 > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 /* Clear the interrupts by re= ading the reg */ > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 err =3D phy_read(phydev, MII_= M1011_IEVENT); > - > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (err < 0) > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0 return err; >=20 > @@ -1454,12 +1482,18 @@ static int marvell_aneg_done(struct phy_device=20 > *phydev) >=20 > =C2=A0static int m88e1121_did_interrupt(struct phy_device *phydev) > =C2=A0{ > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int imask; > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int imask, err; >=20 > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 imask =3D phy_read(phydev, MI= I_M1011_IEVENT); >=20 > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (imask & MII_M1011_IMASK_INIT) > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (imask & MII_M1011_IMASK_INIT) { > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0 if (imask & MII_M1011_IEVENT_WOL_EVENT) { > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 err =3D marvel= l_clear_wol_status(phydev); > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (err < 0) > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return 0; > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0 } > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0 return 1; > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 } >=20 > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return 0; > =C2=A0}