From: Saeed Mahameed <saeedm@mellanox.com>
To: "David S. Miller" <davem@davemloft.net>
Cc: netdev@vger.kernel.org, Ilan Tayari <ilant@mellanox.com>,
Adi Nissim <adin@mellanox.com>,
Saeed Mahameed <saeedm@mellanox.com>
Subject: [net-next 1/7] net/mlx5: FPGA, Add doxygen for access type enum
Date: Tue, 29 May 2018 17:46:44 -0700 [thread overview]
Message-ID: <20180530004650.15029-2-saeedm@mellanox.com> (raw)
In-Reply-To: <20180530004650.15029-1-saeedm@mellanox.com>
From: Ilan Tayari <ilant@mellanox.com>
Add doxygen comments for enum mlx5_fpga_access_type.
Signed-off-by: Ilan Tayari <ilant@mellanox.com>
Signed-off-by: Adi Nissim <adin@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
---
drivers/net/ethernet/mellanox/mlx5/core/fpga/sdk.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fpga/sdk.h b/drivers/net/ethernet/mellanox/mlx5/core/fpga/sdk.h
index a0573cc2fc9b..656f96be6e20 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/fpga/sdk.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fpga/sdk.h
@@ -44,8 +44,14 @@
#define SBU_QP_QUEUE_SIZE 8
#define MLX5_FPGA_CMD_TIMEOUT_MSEC (60 * 1000)
+/**
+ * enum mlx5_fpga_access_type - Enumerated the different methods possible for
+ * accessing the device memory address space
+ */
enum mlx5_fpga_access_type {
+ /** Use the slow CX-FPGA I2C bus */
MLX5_FPGA_ACCESS_TYPE_I2C = 0x0,
+ /** Use the fastest available method */
MLX5_FPGA_ACCESS_TYPE_DONTCARE = 0x0,
};
--
2.17.0
next prev parent reply other threads:[~2018-05-30 0:47 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-30 0:46 [pull request][net-next 0/7] Mellanox, mlx5e & FPGA updates 2018-05-29 Saeed Mahameed
2018-05-30 0:46 ` Saeed Mahameed [this message]
2018-05-30 0:46 ` [net-next 2/7] net/mlx5: FPGA, Add device name Saeed Mahameed
2018-05-30 0:46 ` [net-next 3/7] net/mlx5: FPGA, print SBU identification on init Saeed Mahameed
2018-05-30 0:46 ` [net-next 4/7] net/mlx5: FPGA, Abort FPGA init if the device reports no QP capability Saeed Mahameed
2018-05-30 0:46 ` [net-next 5/7] net/mlx5: FPGA, Properly initialize dma direction on fpga conn send Saeed Mahameed
2018-05-30 0:46 ` [net-next 6/7] net/mlx5: FPGA, Call DMA unmap with the right size Saeed Mahameed
2018-05-30 0:46 ` [net-next 7/7] net/mlx5e: Get the number of offloaded TC rules from the correct table Saeed Mahameed
2018-05-31 17:53 ` [pull request][net-next 0/7] Mellanox, mlx5e & FPGA updates 2018-05-29 David Miller
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