From mboxrd@z Thu Jan 1 00:00:00 1970 From: Leon Romanovsky Subject: [PATCH mlx5-next 1/2] net/mlx5: Add RoCE RX ICRC encapsulated counter Date: Thu, 21 Jun 2018 15:37:55 +0300 Message-ID: <20180621123756.32645-2-leon@kernel.org> References: <20180621123756.32645-1-leon@kernel.org> Cc: Leon Romanovsky , RDMA mailing list , Mark Bloch , Talat Batheesh , Saeed Mahameed , linux-netdev To: Doug Ledford , Jason Gunthorpe Return-path: Received: from mail.kernel.org ([198.145.29.99]:58762 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932898AbeFUMiJ (ORCPT ); Thu, 21 Jun 2018 08:38:09 -0400 In-Reply-To: <20180621123756.32645-1-leon@kernel.org> Sender: netdev-owner@vger.kernel.org List-ID: From: Talat Batheesh Add capability bit in PCAM register and RoCE ICRC error counter to PPCNT register. Signed-off-by: Talat Batheesh Reviewed-by: Mark Bloch Signed-off-by: Leon Romanovsky --- include/linux/mlx5/mlx5_ifc.h | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index b4302ccb63a6..9e8682489951 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -1687,7 +1687,11 @@ struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits { u8 rx_buffer_full_low[0x20]; - u8 reserved_at_1c0[0x600]; + u8 rx_icrc_encapsulated_high[0x20]; + + u8 rx_icrc_encapsulated_low[0x20]; + + u8 reserved_at_3c0[0x5c0]; }; struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits { @@ -8050,8 +8054,9 @@ struct mlx5_ifc_peir_reg_bits { }; struct mlx5_ifc_pcam_enhanced_features_bits { - u8 reserved_at_0[0x76]; - + u8 reserved_at_0[0x6d]; + u8 rx_icrc_encapsulated_counter[0x1]; + u8 reserved_at_6e[0x8]; u8 pfcc_mask[0x1]; u8 reserved_at_77[0x4]; u8 rx_buffer_fullness_counters[0x1]; -- 2.14.4