[PATCH v7 00/11] net: pch_gbe: Fixes, conversion to phylib, enable for MIPS

[PATCH v7 00/11] net: pch_gbe: Fixes, conversion to phylib, enable for MIPS

[Paul Burton]

This series cleans up & reworks the pch_gbe driver such that it no
longer contains PHY-specific code, converts it to phylib & enables it to
be built on MIPS systems for use with the MIPS Boston development board.

Unfortunately I don't have access to a Minnowboard, which the driver
contains some platform-specific code for, so I haven't been able to test
the end result there.

Applies cleanly atop net-next as of commit 27a2628b3c24 ("selftests:
forwarding: mirror_gre_vlan_bridge_1q: Unset rp_filter").

Thanks,
    Paul

Andrew Lunn (1):
  net: pch_gbe: Convert to mdiobus and phylib

Paul Burton (10):
  net: pch_gbe: Remove unused struct pch_gbe_adapter fields
  net: pch_gbe: Mask spare MAC addresses all at once
  net: pch_gbe: Probe PHY ID & initialize only once
  net: pch_gbe: Remove irq_sem
  net: pch_gbe: Move pch_gbe_watchdog lower in pch_gbe_main.c
  net: pch_gbe: Only enable MAC when PHY link is active
  net: pch_gbe: Remove AR8031 PHY hibernation disable
  net: pch_gbe: Clean up resets
  ptp: pch: Allow build on MIPS platforms
  net: pch_gbe: Allow build on MIPS platforms

 drivers/net/ethernet/oki-semi/pch_gbe/Kconfig |   5 +-
 .../net/ethernet/oki-semi/pch_gbe/Makefile    |   2 +-
 .../net/ethernet/oki-semi/pch_gbe/pch_gbe.h   |  20 +-
 .../oki-semi/pch_gbe/pch_gbe_ethtool.c        |  88 +---
 .../ethernet/oki-semi/pch_gbe/pch_gbe_main.c  | 407 ++++++++----------
 .../ethernet/oki-semi/pch_gbe/pch_gbe_param.c | 265 ------------
 .../ethernet/oki-semi/pch_gbe/pch_gbe_phy.c   | 377 ----------------
 .../ethernet/oki-semi/pch_gbe/pch_gbe_phy.h   |  35 --
 drivers/ptp/Kconfig                           |   2 +-
 9 files changed, 191 insertions(+), 1010 deletions(-)
 delete mode 100644 drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c
 delete mode 100644 drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.h

-- 
2.18.0

[PATCH v7 01/11] net: pch_gbe: Remove unused struct pch_gbe_adapter fields

[Paul Burton]

Remove a bunch of unused fields from struct pch_gbe_adapter. Among these
polling_netdev, config_space & led_status are entirely unused.
ethtool_lock is initialized but we never attempt to acquire the lock, so
that is effectively unused too. A msg_enable field was documented but
missing, so drop that from the kerneldoc comment.

Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: David S. Miller <davem@davemloft.net>
Cc: netdev@vger.kernel.org
---

Changes in v7: New patch

 drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h      | 9 ---------
 drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 1 -
 2 files changed, 10 deletions(-)

diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h
index 44c2f291e766..be218ac81f21 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h
@@ -555,11 +555,9 @@ struct pch_gbe_privdata {
 /**
  * struct pch_gbe_adapter - board specific private data structure
  * @stats_lock:	Spinlock structure for status
- * @ethtool_lock:	Spinlock structure for ethtool
  * @irq_sem:		Semaphore for interrupt
  * @netdev:		Pointer of network device structure
  * @pdev:		Pointer of pci device structure
- * @polling_netdev:	Pointer of polling network device structure
  * @napi:		NAPI structure
  * @hw:			Pointer of hardware structure
  * @stats:		Hardware status
@@ -567,9 +565,6 @@ struct pch_gbe_privdata {
  * @mii:		MII information structure
  * @watchdog_timer:	Watchdog timer list
  * @wake_up_evt:	Wake up event
- * @config_space:	Configuration space
- * @msg_enable:		Driver message level
- * @led_status:		LED status
  * @tx_ring:		Pointer of Tx descriptor ring structure
  * @rx_ring:		Pointer of Rx descriptor ring structure
  * @rx_buffer_len:	Receive buffer length
@@ -579,12 +574,10 @@ struct pch_gbe_privdata {
 
 struct pch_gbe_adapter {
 	spinlock_t stats_lock;
-	spinlock_t ethtool_lock;
 	atomic_t irq_sem;
 	struct net_device *netdev;
 	struct pci_dev *pdev;
 	int irq;
-	struct net_device *polling_netdev;
 	struct napi_struct napi;
 	struct pch_gbe_hw hw;
 	struct pch_gbe_hw_stats stats;
@@ -592,8 +585,6 @@ struct pch_gbe_adapter {
 	struct mii_if_info mii;
 	struct timer_list watchdog_timer;
 	u32 wake_up_evt;
-	u32 *config_space;
-	unsigned long led_status;
 	struct pch_gbe_tx_ring *tx_ring;
 	struct pch_gbe_rx_ring *rx_ring;
 	unsigned long rx_buffer_len;
diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
index 43c0c10dfeb7..8908ef654d94 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
@@ -1998,7 +1998,6 @@ static int pch_gbe_sw_init(struct pch_gbe_adapter *adapter)
 	}
 	spin_lock_init(&adapter->hw.miim_lock);
 	spin_lock_init(&adapter->stats_lock);
-	spin_lock_init(&adapter->ethtool_lock);
 	atomic_set(&adapter->irq_sem, 0);
 	pch_gbe_irq_disable(adapter);
 
-- 
2.18.0

[PATCH v7 02/11] net: pch_gbe: Mask spare MAC addresses all at once

[Paul Burton]

pch_gbe_set_multi() loops through each unused MAC address register,
masking them one by one & waiting for a bit to clear indicating that the
change has taken effect before zeroing out the MAC register.

This is needlessly inefficient. We can instead set all the desired mask
bits with a single write to the ADDR_MASK register & wait only once for
the busy bit to clear indicating that the addresses are masked (ie.
ignored) as required.

It's pointless zeroing the MAC registers since they're masked anyway so
their contents are irrelevant, so we can avoid looping over them here
entirely.

Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: David S. Miller <davem@davemloft.net>
Cc: netdev@vger.kernel.org
---

Changes in v7: New patch

 drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
index 8908ef654d94..9651fa02d4bb 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
@@ -2140,15 +2140,13 @@ static void pch_gbe_set_multi(struct net_device *netdev)
 		pch_gbe_mac_mar_set(hw, ha->addr, i++);
 
 	/* If there are spare MAC registers, mask & clear them */
-	for (; i < PCH_GBE_MAR_ENTRIES; i++) {
-		/* Clear MAC address mask */
+	if (i < PCH_GBE_MAR_ENTRIES) {
 		adrmask = ioread32(&hw->reg->ADDR_MASK);
-		iowrite32(adrmask | BIT(i), &hw->reg->ADDR_MASK);
+		adrmask |= GENMASK(PCH_GBE_MAR_ENTRIES - 1, i);
+		iowrite32(adrmask, &hw->reg->ADDR_MASK);
+
 		/* wait busy */
 		pch_gbe_wait_clr_bit(&hw->reg->ADDR_MASK, PCH_GBE_BUSY);
-		/* Clear MAC address */
-		iowrite32(0, &hw->reg->mac_adr[i].high);
-		iowrite32(0, &hw->reg->mac_adr[i].low);
 	}
 
 	netdev_dbg(netdev,
-- 
2.18.0

[PATCH v7 03/11] net: pch_gbe: Probe PHY ID & initialize only once

[Paul Burton]

The pch_gbe driver currently probes for the PHY ID & configures the PHY
every time the MAC is reset, even though we know that the PHY won't have
changed since the last MAC reset [1].

This patch moves the PHY probe to instead happen only once when the
driver is probed, saving time & moving us closer to the behavior we'll
have with phylib.

[1] Please, someone patent PHY hotplugging & rigorously enforce said
    patent such that nobody can do it. At least not with an EG20T MAC.

Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: David S. Miller <davem@davemloft.net>
Cc: netdev@vger.kernel.org
---

Changes in v7: New patch

 .../ethernet/oki-semi/pch_gbe/pch_gbe_main.c  | 26 ++++++++++---------
 1 file changed, 14 insertions(+), 12 deletions(-)

diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
index 9651fa02d4bb..5157cea16773 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
@@ -617,8 +617,10 @@ static void pch_gbe_init_stats(struct pch_gbe_adapter *adapter)
 static int pch_gbe_init_phy(struct pch_gbe_adapter *adapter)
 {
 	struct net_device *netdev = adapter->netdev;
+	struct pch_gbe_hw *hw = &adapter->hw;
 	u32 addr;
 	u16 bmcr, stat;
+	s32 ret_val;
 
 	/* Discover phy addr by searching addrs in order {1,0,2,..., 31} */
 	for (addr = 0; addr < PCH_GBE_PHY_REGS_LEN; addr++) {
@@ -652,6 +654,16 @@ static int pch_gbe_init_phy(struct pch_gbe_adapter *adapter)
 	adapter->mii.mdio_read = pch_gbe_mdio_read;
 	adapter->mii.mdio_write = pch_gbe_mdio_write;
 	adapter->mii.supports_gmii = mii_check_gmii_support(&adapter->mii);
+
+	ret_val = pch_gbe_phy_get_id(hw);
+	if (ret_val) {
+		netdev_err(adapter->netdev, "pch_gbe_phy_get_id error\n");
+		return -EIO;
+	}
+	pch_gbe_phy_init_setting(hw);
+	/* Setup Mac interface option RGMII */
+	pch_gbe_phy_set_rgmii(hw);
+
 	return 0;
 }
 
@@ -721,22 +733,12 @@ void pch_gbe_reset(struct pch_gbe_adapter *adapter)
 {
 	struct net_device *netdev = adapter->netdev;
 	struct pch_gbe_hw *hw = &adapter->hw;
-	s32 ret_val;
 
 	pch_gbe_mac_reset_hw(hw);
 	/* reprogram multicast address register after reset */
 	pch_gbe_set_multi(netdev);
 	/* Setup the receive address. */
 	pch_gbe_mac_init_rx_addrs(hw, PCH_GBE_MAR_ENTRIES);
-
-	ret_val = pch_gbe_phy_get_id(hw);
-	if (ret_val) {
-		netdev_err(adapter->netdev, "pch_gbe_phy_get_id error\n");
-		return;
-	}
-	pch_gbe_phy_init_setting(hw);
-	/* Setup Mac interface option RGMII */
-	pch_gbe_phy_set_rgmii(hw);
 }
 
 /**
@@ -2577,6 +2579,8 @@ static int pch_gbe_probe(struct pci_dev *pdev,
 	if (ret)
 		goto err_free_netdev;
 
+	pch_gbe_check_options(adapter);
+
 	/* Initialize PHY */
 	ret = pch_gbe_init_phy(adapter);
 	if (ret) {
@@ -2606,8 +2610,6 @@ static int pch_gbe_probe(struct pci_dev *pdev,
 
 	INIT_WORK(&adapter->reset_task, pch_gbe_reset_task);
 
-	pch_gbe_check_options(adapter);
-
 	/* initialize the wol settings based on the eeprom settings */
 	adapter->wake_up_evt = PCH_GBE_WL_INIT_SETTING;
 	dev_info(&pdev->dev, "MAC address : %pM\n", netdev->dev_addr);
-- 
2.18.0

Re: [PATCH v7 03/11] net: pch_gbe: Probe PHY ID & initialize only once

[Andrew Lunn]

On Tue, Jun 26, 2018 at 05:06:04PM -0700, Paul Burton wrote:
> The pch_gbe driver currently probes for the PHY ID & configures the PHY
> every time the MAC is reset, even though we know that the PHY won't have
> changed since the last MAC reset [1].
> 
> This patch moves the PHY probe to instead happen only once when the
> driver is probed, saving time & moving us closer to the behavior we'll
> have with phylib.
> 
> [1] Please, someone patent PHY hotplugging & rigorously enforce said
>     patent such that nobody can do it. At least not with an EG20T MAC.

Hi Paul

It is already possible, and probably patented. SFP cages are usually
used for fibre optical modules. But it is also possible to have copper
modules, which contain a standard PHY. And SFP modules are
hot-plugable...

> 
> Signed-off-by: Paul Burton <paul.burton@mips.com>
> Cc: Andrew Lunn <andrew@lunn.ch>
> Cc: David S. Miller <davem@davemloft.net>
> Cc: netdev@vger.kernel.org
> ---
> 
> Changes in v7: New patch
> 
>  .../ethernet/oki-semi/pch_gbe/pch_gbe_main.c  | 26 ++++++++++---------
>  1 file changed, 14 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
> index 9651fa02d4bb..5157cea16773 100644
> --- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
> +++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
> @@ -617,8 +617,10 @@ static void pch_gbe_init_stats(struct pch_gbe_adapter *adapter)
>  static int pch_gbe_init_phy(struct pch_gbe_adapter *adapter)
>  {
>  	struct net_device *netdev = adapter->netdev;
> +	struct pch_gbe_hw *hw = &adapter->hw;
>  	u32 addr;
>  	u16 bmcr, stat;
> +	s32 ret_val;
>  
>  	/* Discover phy addr by searching addrs in order {1,0,2,..., 31} */
>  	for (addr = 0; addr < PCH_GBE_PHY_REGS_LEN; addr++) {
> @@ -652,6 +654,16 @@ static int pch_gbe_init_phy(struct pch_gbe_adapter *adapter)
>  	adapter->mii.mdio_read = pch_gbe_mdio_read;
>  	adapter->mii.mdio_write = pch_gbe_mdio_write;
>  	adapter->mii.supports_gmii = mii_check_gmii_support(&adapter->mii);
> +
> +	ret_val = pch_gbe_phy_get_id(hw);
> +	if (ret_val) {
> +		netdev_err(adapter->netdev, "pch_gbe_phy_get_id error\n");
> +		return -EIO;
> +	}
> +	pch_gbe_phy_init_setting(hw);
> +	/* Setup Mac interface option RGMII */
> +	pch_gbe_phy_set_rgmii(hw);
> +
>  	return 0;
>  }
>  
> @@ -721,22 +733,12 @@ void pch_gbe_reset(struct pch_gbe_adapter *adapter)
>  {
>  	struct net_device *netdev = adapter->netdev;
>  	struct pch_gbe_hw *hw = &adapter->hw;
> -	s32 ret_val;
>  
>  	pch_gbe_mac_reset_hw(hw);
>  	/* reprogram multicast address register after reset */
>  	pch_gbe_set_multi(netdev);
>  	/* Setup the receive address. */
>  	pch_gbe_mac_init_rx_addrs(hw, PCH_GBE_MAR_ENTRIES);
> -
> -	ret_val = pch_gbe_phy_get_id(hw);
> -	if (ret_val) {
> -		netdev_err(adapter->netdev, "pch_gbe_phy_get_id error\n");
> -		return;
> -	}
> -	pch_gbe_phy_init_setting(hw);
> -	/* Setup Mac interface option RGMII */
> -	pch_gbe_phy_set_rgmii(hw);
>  }
>  
>  /**

Up to here, everything looks O.K.

> @@ -2577,6 +2579,8 @@ static int pch_gbe_probe(struct pci_dev *pdev,
>  	if (ret)
>  		goto err_free_netdev;
>  
> +	pch_gbe_check_options(adapter);
> +
>  	/* Initialize PHY */
>  	ret = pch_gbe_init_phy(adapter);
>  	if (ret) {
> @@ -2606,8 +2610,6 @@ static int pch_gbe_probe(struct pci_dev *pdev,
>  
>  	INIT_WORK(&adapter->reset_task, pch_gbe_reset_task);
>  
> -	pch_gbe_check_options(adapter);
> -
>  	/* initialize the wol settings based on the eeprom settings */
>  	adapter->wake_up_evt = PCH_GBE_WL_INIT_SETTING;
>  	dev_info(&pdev->dev, "MAC address : %pM\n", netdev->dev_addr);

But these two changes seem unrelated. Should they be in a different
patch?

	Andrew

Re: [PATCH v7 03/11] net: pch_gbe: Probe PHY ID & initialize only once

[Paul Burton]

Hi Andrew,

On Wed, Jun 27, 2018 at 07:21:31PM +0200, Andrew Lunn wrote:
> > [1] Please, someone patent PHY hotplugging & rigorously enforce said
> >     patent such that nobody can do it. At least not with an EG20T MAC.
> 
> Hi Paul
> 
> It is already possible, and probably patented. SFP cages are usually
> used for fibre optical modules. But it is also possible to have copper
> modules, which contain a standard PHY. And SFP modules are
> hot-plugable...

D'oh, but at least not relevant to the EG20T/pch_gbe :)

> > @@ -2577,6 +2579,8 @@ static int pch_gbe_probe(struct pci_dev *pdev,
> >  	if (ret)
> >  		goto err_free_netdev;
> >  
> > +	pch_gbe_check_options(adapter);
> > +
> >  	/* Initialize PHY */
> >  	ret = pch_gbe_init_phy(adapter);
> >  	if (ret) {
> > @@ -2606,8 +2610,6 @@ static int pch_gbe_probe(struct pci_dev *pdev,
> >  
> >  	INIT_WORK(&adapter->reset_task, pch_gbe_reset_task);
> >  
> > -	pch_gbe_check_options(adapter);
> > -
> >  	/* initialize the wol settings based on the eeprom settings */
> >  	adapter->wake_up_evt = PCH_GBE_WL_INIT_SETTING;
> >  	dev_info(&pdev->dev, "MAC address : %pM\n", netdev->dev_addr);
> 
> But these two changes seem unrelated. Should they be in a different
> patch?

This is actually needed because pch_gbe_check_options() sets up, amongst
other things, the autoneg_advertised field in struct pch_gbe_phy_info
and that needs to happen before pch_gbe_phy_init_setting() is called.

Thanks,
    Paul

Re: [PATCH v7 03/11] net: pch_gbe: Probe PHY ID & initialize only once

[Andrew Lunn]

> This is actually needed because pch_gbe_check_options() sets up, amongst
> other things, the autoneg_advertised field in struct pch_gbe_phy_info
> and that needs to happen before pch_gbe_phy_init_setting() is called.

Hi Paul

Please add a comment to the commit message about this.

       Andrew

Re: [PATCH v7 03/11] net: pch_gbe: Probe PHY ID & initialize only once

[Andrew Lunn]

On Tue, Jun 26, 2018 at 05:06:04PM -0700, Paul Burton wrote:
> The pch_gbe driver currently probes for the PHY ID & configures the PHY
> every time the MAC is reset, even though we know that the PHY won't have
> changed since the last MAC reset [1].
> 
> This patch moves the PHY probe to instead happen only once when the
> driver is probed, saving time & moving us closer to the behavior we'll
> have with phylib.

> 
> [1] Please, someone patent PHY hotplugging & rigorously enforce said
>     patent such that nobody can do it. At least not with an EG20T MAC.

I suppose one additional point here is that with the change to phylib,
and the removal of the code to disable hibernation, the phyid becomes
irrelevant to the MAC driver. So the important change here is moving
phy initialization to the probe.

   Andrew

[PATCH v7 04/11] net: pch_gbe: Remove irq_sem

[Paul Burton]

The pch_gbe driver uses an irq_sem variable to implement a sempahore
that seems to inconsistently count the number of times we enable or
disable interrupts, and only write to the interrupt enable register when
this count hits 0. This makes absolutely no sense to me, both from the
perspective of how the implementation is modifying the variable & more
fundamentally the fact that we know when we want or do not want
interrupts enabled without any need for the semaphore.

This patch removes irq_sem, so pch_gbe_irq_enable() &
pch_gbe_irq_disable() will both always write to the INT_EN register.

Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: David S. Miller <davem@davemloft.net>
Cc: netdev@vger.kernel.org
---

Changes in v7: New patch

 drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h      | 2 --
 drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 7 +------
 2 files changed, 1 insertion(+), 8 deletions(-)

diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h
index be218ac81f21..1bb0ea4f5503 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h
@@ -555,7 +555,6 @@ struct pch_gbe_privdata {
 /**
  * struct pch_gbe_adapter - board specific private data structure
  * @stats_lock:	Spinlock structure for status
- * @irq_sem:		Semaphore for interrupt
  * @netdev:		Pointer of network device structure
  * @pdev:		Pointer of pci device structure
  * @napi:		NAPI structure
@@ -574,7 +573,6 @@ struct pch_gbe_privdata {
 
 struct pch_gbe_adapter {
 	spinlock_t stats_lock;
-	atomic_t irq_sem;
 	struct net_device *netdev;
 	struct pci_dev *pdev;
 	int irq;
diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
index 5157cea16773..ee38bba8b9ce 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
@@ -761,7 +761,6 @@ static void pch_gbe_irq_disable(struct pch_gbe_adapter *adapter)
 {
 	struct pch_gbe_hw *hw = &adapter->hw;
 
-	atomic_inc(&adapter->irq_sem);
 	iowrite32(0, &hw->reg->INT_EN);
 	ioread32(&hw->reg->INT_ST);
 	synchronize_irq(adapter->irq);
@@ -778,8 +777,7 @@ static void pch_gbe_irq_enable(struct pch_gbe_adapter *adapter)
 {
 	struct pch_gbe_hw *hw = &adapter->hw;
 
-	if (likely(atomic_dec_and_test(&adapter->irq_sem)))
-		iowrite32(PCH_GBE_INT_ENABLE_MASK, &hw->reg->INT_EN);
+	iowrite32(PCH_GBE_INT_ENABLE_MASK, &hw->reg->INT_EN);
 	ioread32(&hw->reg->INT_ST);
 	netdev_dbg(adapter->netdev, "INT_EN reg : 0x%08x\n",
 		   ioread32(&hw->reg->INT_EN));
@@ -1345,7 +1343,6 @@ static irqreturn_t pch_gbe_intr(int irq, void *data)
 	    (adapter->rx_stop_flag)) {
 		if (likely(napi_schedule_prep(&adapter->napi))) {
 			/* Enable only Rx Descriptor empty */
-			atomic_inc(&adapter->irq_sem);
 			int_en = ioread32(&hw->reg->INT_EN);
 			int_en &=
 			    ~(PCH_GBE_INT_RX_DMA_CMPLT | PCH_GBE_INT_TX_CMPLT);
@@ -1954,7 +1951,6 @@ void pch_gbe_down(struct pch_gbe_adapter *adapter)
 	/* signal that we're down so the interrupt handler does not
 	 * reschedule our watchdog timer */
 	napi_disable(&adapter->napi);
-	atomic_set(&adapter->irq_sem, 0);
 
 	pch_gbe_irq_disable(adapter);
 	pch_gbe_free_irq(adapter);
@@ -2000,7 +1996,6 @@ static int pch_gbe_sw_init(struct pch_gbe_adapter *adapter)
 	}
 	spin_lock_init(&adapter->hw.miim_lock);
 	spin_lock_init(&adapter->stats_lock);
-	atomic_set(&adapter->irq_sem, 0);
 	pch_gbe_irq_disable(adapter);
 
 	pch_gbe_init_stats(adapter);
-- 
2.18.0

[PATCH v7 05/11] net: pch_gbe: Move pch_gbe_watchdog lower in pch_gbe_main.c

[Paul Burton]

This patch moves the pch_gbe_watchdog() function lower in pch_gbe_main.c
in order to allow use of other functions in the next patch, without
requiring lots of forward declarations. Doing this as a separate patch
makes it clearer what actually changed in the next patch.

The function is unmodified except for whitespace changes to satisfy
checkpatch.

Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: David S. Miller <davem@davemloft.net>
Cc: netdev@vger.kernel.org
---

Changes in v7: New patch

 .../ethernet/oki-semi/pch_gbe/pch_gbe_main.c  | 103 +++++++++---------
 1 file changed, 52 insertions(+), 51 deletions(-)

diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
index ee38bba8b9ce..eb290c1edce0 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
@@ -1046,57 +1046,6 @@ static void pch_gbe_set_mode(struct pch_gbe_adapter *adapter, u16 speed,
 	iowrite32(mode, &hw->reg->MODE);
 }
 
-/**
- * pch_gbe_watchdog - Watchdog process
- * @data:  Board private structure
- */
-static void pch_gbe_watchdog(struct timer_list *t)
-{
-	struct pch_gbe_adapter *adapter = from_timer(adapter, t,
-						     watchdog_timer);
-	struct net_device *netdev = adapter->netdev;
-	struct pch_gbe_hw *hw = &adapter->hw;
-
-	netdev_dbg(netdev, "right now = %ld\n", jiffies);
-
-	pch_gbe_update_stats(adapter);
-	if ((mii_link_ok(&adapter->mii)) && (!netif_carrier_ok(netdev))) {
-		struct ethtool_cmd cmd = { .cmd = ETHTOOL_GSET };
-		netdev->tx_queue_len = adapter->tx_queue_len;
-		/* mii library handles link maintenance tasks */
-		if (mii_ethtool_gset(&adapter->mii, &cmd)) {
-			netdev_err(netdev, "ethtool get setting Error\n");
-			mod_timer(&adapter->watchdog_timer,
-				  round_jiffies(jiffies +
-						PCH_GBE_WATCHDOG_PERIOD));
-			return;
-		}
-		hw->mac.link_speed = ethtool_cmd_speed(&cmd);
-		hw->mac.link_duplex = cmd.duplex;
-		/* Set the RGMII control. */
-		pch_gbe_set_rgmii_ctrl(adapter, hw->mac.link_speed,
-						hw->mac.link_duplex);
-		/* Set the communication mode */
-		pch_gbe_set_mode(adapter, hw->mac.link_speed,
-				 hw->mac.link_duplex);
-		netdev_dbg(netdev,
-			   "Link is Up %d Mbps %s-Duplex\n",
-			   hw->mac.link_speed,
-			   cmd.duplex == DUPLEX_FULL ? "Full" : "Half");
-		netif_carrier_on(netdev);
-		netif_wake_queue(netdev);
-	} else if ((!mii_link_ok(&adapter->mii)) &&
-		   (netif_carrier_ok(netdev))) {
-		netdev_dbg(netdev, "NIC Link is Down\n");
-		hw->mac.link_speed = SPEED_10;
-		hw->mac.link_duplex = DUPLEX_HALF;
-		netif_carrier_off(netdev);
-		netif_stop_queue(netdev);
-	}
-	mod_timer(&adapter->watchdog_timer,
-		  round_jiffies(jiffies + PCH_GBE_WATCHDOG_PERIOD));
-}
-
 /**
  * pch_gbe_tx_queue - Carry out queuing of the transmission data
  * @adapter:  Board private structure
@@ -1973,6 +1922,58 @@ void pch_gbe_down(struct pch_gbe_adapter *adapter)
 	rx_ring->rx_buff_pool = NULL;
 }
 
+/**
+ * pch_gbe_watchdog - Watchdog process
+ * @data:  Board private structure
+ */
+static void pch_gbe_watchdog(struct timer_list *t)
+{
+	struct pch_gbe_adapter *adapter = from_timer(adapter, t,
+						     watchdog_timer);
+	struct net_device *netdev = adapter->netdev;
+	struct pch_gbe_hw *hw = &adapter->hw;
+
+	netdev_dbg(netdev, "right now = %ld\n", jiffies);
+
+	pch_gbe_update_stats(adapter);
+	if ((mii_link_ok(&adapter->mii)) && (!netif_carrier_ok(netdev))) {
+		struct ethtool_cmd cmd = { .cmd = ETHTOOL_GSET };
+
+		netdev->tx_queue_len = adapter->tx_queue_len;
+		/* mii library handles link maintenance tasks */
+		if (mii_ethtool_gset(&adapter->mii, &cmd)) {
+			netdev_err(netdev, "ethtool get setting Error\n");
+			mod_timer(&adapter->watchdog_timer,
+				  round_jiffies(jiffies +
+						PCH_GBE_WATCHDOG_PERIOD));
+			return;
+		}
+		hw->mac.link_speed = ethtool_cmd_speed(&cmd);
+		hw->mac.link_duplex = cmd.duplex;
+		/* Set the RGMII control. */
+		pch_gbe_set_rgmii_ctrl(adapter, hw->mac.link_speed,
+				       hw->mac.link_duplex);
+		/* Set the communication mode */
+		pch_gbe_set_mode(adapter, hw->mac.link_speed,
+				 hw->mac.link_duplex);
+		netdev_dbg(netdev,
+			   "Link is Up %d Mbps %s-Duplex\n",
+			   hw->mac.link_speed,
+			   cmd.duplex == DUPLEX_FULL ? "Full" : "Half");
+		netif_carrier_on(netdev);
+		netif_wake_queue(netdev);
+	} else if ((!mii_link_ok(&adapter->mii)) &&
+		   (netif_carrier_ok(netdev))) {
+		netdev_dbg(netdev, "NIC Link is Down\n");
+		hw->mac.link_speed = SPEED_10;
+		hw->mac.link_duplex = DUPLEX_HALF;
+		netif_carrier_off(netdev);
+		netif_stop_queue(netdev);
+	}
+	mod_timer(&adapter->watchdog_timer,
+		  round_jiffies(jiffies + PCH_GBE_WATCHDOG_PERIOD));
+}
+
 /**
  * pch_gbe_sw_init - Initialize general software structures (struct pch_gbe_adapter)
  * @adapter:  Board private structure to initialize
-- 
2.18.0

Re: [PATCH v7 05/11] net: pch_gbe: Move pch_gbe_watchdog lower in pch_gbe_main.c

[Andrew Lunn]

On Tue, Jun 26, 2018 at 05:06:06PM -0700, Paul Burton wrote:
> This patch moves the pch_gbe_watchdog() function lower in pch_gbe_main.c
> in order to allow use of other functions in the next patch, without
> requiring lots of forward declarations. Doing this as a separate patch
> makes it clearer what actually changed in the next patch.
> 
> The function is unmodified except for whitespace changes to satisfy
> checkpatch.
> 
> Signed-off-by: Paul Burton <paul.burton@mips.com>
> Cc: Andrew Lunn <andrew@lunn.ch>
> Cc: David S. Miller <davem@davemloft.net>
> Cc: netdev@vger.kernel.org

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

[PATCH v7 06/11] net: pch_gbe: Only enable MAC when PHY link is active

[Paul Burton]

When using a PHY connected via RGMII, as the pch_gbe driver presumes is
the case, the RX clock is provided by the PHY to the MAC. Various PHYs,
including both the AR8031 used by the Minnowboard & the RTL8211E used by
the MIPS Boston development board, will stop generating the RX clock
when the ethernet link is down (eg. the ethernet cable is unplugged).

Various pieces of functionality in the EG20T MAC, ranging from basics
like completing a MAC reset to programming MAC addresses, rely upon the
RX clock being provided. When the clock is not provided these pieces of
functionality simply never complete, and the busy bits that indicate
they're in progress remain set indefinitely.

The pch_gbe driver currently requires that the RX clock is always
provided, and attempts to enforce this by disabling the hibernation
feature of the AR8031 PHY to keep it generating the RX clock. This patch
moves us away from this model by only configuring the MAC when the PHY
indicates that the ethernet link is up. When the link is up we should be
able to safely expect that the RX clock is being provided, and therefore
safely reset & configure the MAC.

Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: David S. Miller <davem@davemloft.net>
Cc: netdev@vger.kernel.org
---

Changes in v7: New patch

 .../ethernet/oki-semi/pch_gbe/pch_gbe_main.c  | 44 +++++++++----------
 1 file changed, 22 insertions(+), 22 deletions(-)

diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
index eb290c1edce0..721ce29b6467 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
@@ -1837,7 +1837,6 @@ static int pch_gbe_request_irq(struct pch_gbe_adapter *adapter)
 int pch_gbe_up(struct pch_gbe_adapter *adapter)
 {
 	struct net_device *netdev = adapter->netdev;
-	struct pch_gbe_tx_ring *tx_ring = adapter->tx_ring;
 	struct pch_gbe_rx_ring *rx_ring = adapter->rx_ring;
 	int err = -EINVAL;
 
@@ -1847,14 +1846,6 @@ int pch_gbe_up(struct pch_gbe_adapter *adapter)
 		goto out;
 	}
 
-	/* hardware has been reset, we need to reload some things */
-	pch_gbe_set_multi(netdev);
-
-	pch_gbe_setup_tctl(adapter);
-	pch_gbe_configure_tx(adapter);
-	pch_gbe_setup_rctl(adapter);
-	pch_gbe_configure_rx(adapter);
-
 	err = pch_gbe_request_irq(adapter);
 	if (err) {
 		netdev_err(netdev,
@@ -1867,18 +1858,9 @@ int pch_gbe_up(struct pch_gbe_adapter *adapter)
 			   "Error: can't bring device up - alloc rx buffers pool failed\n");
 		goto freeirq;
 	}
-	pch_gbe_alloc_tx_buffers(adapter, tx_ring);
-	pch_gbe_alloc_rx_buffers(adapter, rx_ring, rx_ring->count);
 	adapter->tx_queue_len = netdev->tx_queue_len;
-	pch_gbe_enable_dma_rx(&adapter->hw);
-	pch_gbe_enable_mac_rx(&adapter->hw);
 
 	mod_timer(&adapter->watchdog_timer, jiffies);
-
-	napi_enable(&adapter->napi);
-	pch_gbe_irq_enable(adapter);
-	netif_start_queue(adapter->netdev);
-
 	return 0;
 
 freeirq:
@@ -1930,6 +1912,8 @@ static void pch_gbe_watchdog(struct timer_list *t)
 {
 	struct pch_gbe_adapter *adapter = from_timer(adapter, t,
 						     watchdog_timer);
+	struct pch_gbe_rx_ring *rx_ring = adapter->rx_ring;
+	struct pch_gbe_tx_ring *tx_ring = adapter->tx_ring;
 	struct net_device *netdev = adapter->netdev;
 	struct pch_gbe_hw *hw = &adapter->hw;
 
@@ -1950,12 +1934,32 @@ static void pch_gbe_watchdog(struct timer_list *t)
 		}
 		hw->mac.link_speed = ethtool_cmd_speed(&cmd);
 		hw->mac.link_duplex = cmd.duplex;
+
+		pch_gbe_reset(adapter);
+
 		/* Set the RGMII control. */
 		pch_gbe_set_rgmii_ctrl(adapter, hw->mac.link_speed,
 				       hw->mac.link_duplex);
 		/* Set the communication mode */
 		pch_gbe_set_mode(adapter, hw->mac.link_speed,
 				 hw->mac.link_duplex);
+
+		pch_gbe_set_multi(netdev);
+		pch_gbe_setup_tctl(adapter);
+		pch_gbe_configure_tx(adapter);
+		pch_gbe_setup_rctl(adapter);
+		pch_gbe_configure_rx(adapter);
+
+		pch_gbe_alloc_tx_buffers(adapter, tx_ring);
+		pch_gbe_alloc_rx_buffers(adapter, rx_ring, rx_ring->count);
+
+		pch_gbe_enable_dma_rx(&adapter->hw);
+		pch_gbe_enable_mac_rx(&adapter->hw);
+
+		napi_enable(&adapter->napi);
+		pch_gbe_irq_enable(adapter);
+		netif_start_queue(adapter->netdev);
+
 		netdev_dbg(netdev,
 			   "Link is Up %d Mbps %s-Duplex\n",
 			   hw->mac.link_speed,
@@ -2568,7 +2572,6 @@ static int pch_gbe_probe(struct pci_dev *pdev,
 			  (ETH_HLEN + ETH_FCS_LEN);
 
 	pch_gbe_mac_load_mac_addr(&adapter->hw);
-	pch_gbe_mac_reset_hw(&adapter->hw);
 
 	/* setup the private structure */
 	ret = pch_gbe_sw_init(adapter);
@@ -2610,9 +2613,6 @@ static int pch_gbe_probe(struct pci_dev *pdev,
 	adapter->wake_up_evt = PCH_GBE_WL_INIT_SETTING;
 	dev_info(&pdev->dev, "MAC address : %pM\n", netdev->dev_addr);
 
-	/* reset the hardware with the new settings */
-	pch_gbe_reset(adapter);
-
 	ret = register_netdev(netdev);
 	if (ret)
 		goto err_free_adapter;
-- 
2.18.0

Re: [PATCH v7 06/11] net: pch_gbe: Only enable MAC when PHY link is active

[Andrew Lunn]

On Tue, Jun 26, 2018 at 05:06:07PM -0700, Paul Burton wrote:
> When using a PHY connected via RGMII, as the pch_gbe driver presumes is
> the case, the RX clock is provided by the PHY to the MAC. Various PHYs,
> including both the AR8031 used by the Minnowboard & the RTL8211E used by
> the MIPS Boston development board, will stop generating the RX clock
> when the ethernet link is down (eg. the ethernet cable is unplugged).
> 
> Various pieces of functionality in the EG20T MAC, ranging from basics
> like completing a MAC reset to programming MAC addresses, rely upon the
> RX clock being provided. When the clock is not provided these pieces of
> functionality simply never complete, and the busy bits that indicate
> they're in progress remain set indefinitely.
> 
> The pch_gbe driver currently requires that the RX clock is always
> provided, and attempts to enforce this by disabling the hibernation
> feature of the AR8031 PHY to keep it generating the RX clock. This patch
> moves us away from this model by only configuring the MAC when the PHY
> indicates that the ethernet link is up. When the link is up we should be
> able to safely expect that the RX clock is being provided, and therefore
> safely reset & configure the MAC.

Hi Paul

I like the concept, but the implementation is not clear. Maybe it just
needs more details in the commit message. What has the watchdog got to
do with link up?

And what happens on link down? Does the MAC need shutting down? I
don't see such code here.

    Andrew

Re: [PATCH v7 06/11] net: pch_gbe: Only enable MAC when PHY link is active

[Paul Burton]

Hi Andrew,

On Wed, Jun 27, 2018 at 07:30:14PM +0200, Andrew Lunn wrote:
> On Tue, Jun 26, 2018 at 05:06:07PM -0700, Paul Burton wrote:
> > When using a PHY connected via RGMII, as the pch_gbe driver presumes is
> > the case, the RX clock is provided by the PHY to the MAC. Various PHYs,
> > including both the AR8031 used by the Minnowboard & the RTL8211E used by
> > the MIPS Boston development board, will stop generating the RX clock
> > when the ethernet link is down (eg. the ethernet cable is unplugged).
> > 
> > Various pieces of functionality in the EG20T MAC, ranging from basics
> > like completing a MAC reset to programming MAC addresses, rely upon the
> > RX clock being provided. When the clock is not provided these pieces of
> > functionality simply never complete, and the busy bits that indicate
> > they're in progress remain set indefinitely.
> > 
> > The pch_gbe driver currently requires that the RX clock is always
> > provided, and attempts to enforce this by disabling the hibernation
> > feature of the AR8031 PHY to keep it generating the RX clock. This patch
> > moves us away from this model by only configuring the MAC when the PHY
> > indicates that the ethernet link is up. When the link is up we should be
> > able to safely expect that the RX clock is being provided, and therefore
> > safely reset & configure the MAC.
> 
> Hi Paul
> 
> I like the concept, but the implementation is not clear. Maybe it just
> needs more details in the commit message. What has the watchdog got to
> do with link up?

pch_gbe_watchdog() polls for the link coming up or going down, so that's
where we find out that the link is up.

> And what happens on link down? Does the MAC need shutting down? I
> don't see such code here.

Well, depending upon the PHY the RX clock might stop which will prevent
parts of the MAC from functioning properly. Exactly which parts I don't
really know - the EG20T documentation is vague & unclear. I do know
that:

  - We won't receive packets any more, of course. This should be fine
    without any extra handling because we just won't see any futher DMA
    complete interrupts (or the associated bit set when polling).

  - A MAC reset won't complete - ie. the pch_gbe_wait_clr_bit() in
    pch_gbe_reset()/pch_gbe_reset_hw() will time out. This I think
    should be OK because after this patch we won't generally reset the
    MAC when the link is down anyway, except perhaps the PCI error_state
    case in pch_gbe_down(). I'm not sure what the reset there is for...

  - Masking or unmasking MAC address registers won't complete - ie. the
    pch_gbe_wait_clr_bit() in pch_gbe_mac_mar_set() or
    pch_gbe_set_multi() will time out. This is again when the link is
    already known to be up, although there is a case in
    __pch_gbe_suspend() which is setting up WoL that I'm not so sure
    about...

Thanks,
    Paul

Re: [PATCH v7 06/11] net: pch_gbe: Only enable MAC when PHY link is active

[Andrew Lunn]

On Wed, Jun 27, 2018 at 10:54:28AM -0700, Paul Burton wrote:
> Hi Andrew,
> 
> On Wed, Jun 27, 2018 at 07:30:14PM +0200, Andrew Lunn wrote:
> > On Tue, Jun 26, 2018 at 05:06:07PM -0700, Paul Burton wrote:
> > > When using a PHY connected via RGMII, as the pch_gbe driver presumes is
> > > the case, the RX clock is provided by the PHY to the MAC. Various PHYs,
> > > including both the AR8031 used by the Minnowboard & the RTL8211E used by
> > > the MIPS Boston development board, will stop generating the RX clock
> > > when the ethernet link is down (eg. the ethernet cable is unplugged).
> > > 
> > > Various pieces of functionality in the EG20T MAC, ranging from basics
> > > like completing a MAC reset to programming MAC addresses, rely upon the
> > > RX clock being provided. When the clock is not provided these pieces of
> > > functionality simply never complete, and the busy bits that indicate
> > > they're in progress remain set indefinitely.
> > > 
> > > The pch_gbe driver currently requires that the RX clock is always
> > > provided, and attempts to enforce this by disabling the hibernation
> > > feature of the AR8031 PHY to keep it generating the RX clock. This patch
> > > moves us away from this model by only configuring the MAC when the PHY
> > > indicates that the ethernet link is up. When the link is up we should be
> > > able to safely expect that the RX clock is being provided, and therefore
> > > safely reset & configure the MAC.
> > 
> > Hi Paul
> > 
> > I like the concept, but the implementation is not clear. Maybe it just
> > needs more details in the commit message. What has the watchdog got to
> > do with link up?
> 
> pch_gbe_watchdog() polls for the link coming up or going down, so that's
> where we find out that the link is up.

I was thinking it would be something like that. So could you please
explain this in the commit message.

Does the watchdog later become the adjust_link callback for phylib?
Having a name based around adjust_link would make this clearer. That
is the norm. But i understand this is a preparation step, so the
rename might happen later?

> > And what happens on link down? Does the MAC need shutting down? I
> > don't see such code here.
> 
> Well, depending upon the PHY the RX clock might stop which will prevent
> parts of the MAC from functioning properly.

The datasheet for the Atheros PHY suggests the clock will stop after a
while. So again, commenting why you think nothing extra is needed
would be good.

Basically, there is a lot of non-obvious stuff going on here, and it
helps both reviewer and future debugger to have a fuller explanation.

Thanks
	Andrew

Re: [PATCH v7 06/11] net: pch_gbe: Only enable MAC when PHY link is active

[Florian Fainelli]

On 06/26/2018 05:06 PM, Paul Burton wrote:
> When using a PHY connected via RGMII, as the pch_gbe driver presumes is
> the case, the RX clock is provided by the PHY to the MAC. Various PHYs,
> including both the AR8031 used by the Minnowboard & the RTL8211E used by
> the MIPS Boston development board, will stop generating the RX clock
> when the ethernet link is down (eg. the ethernet cable is unplugged).
> 
> Various pieces of functionality in the EG20T MAC, ranging from basics
> like completing a MAC reset to programming MAC addresses, rely upon the
> RX clock being provided. When the clock is not provided these pieces of
> functionality simply never complete, and the busy bits that indicate
> they're in progress remain set indefinitely.
> 
> The pch_gbe driver currently requires that the RX clock is always
> provided, and attempts to enforce this by disabling the hibernation
> feature of the AR8031 PHY to keep it generating the RX clock. This patch
> moves us away from this model by only configuring the MAC when the PHY
> indicates that the ethernet link is up. When the link is up we should be
> able to safely expect that the RX clock is being provided, and therefore
> safely reset & configure the MAC.

What we ended up doing in the bcmgenet driver is loop back the RX and TX
clocks such that we always have a clock that we can use to perform any
MAC operation, including reset.

Is this an option here? You might also want to split the allocation from
the actual initialization if this is not done already.

> 
> Signed-off-by: Paul Burton <paul.burton@mips.com>
> Cc: Andrew Lunn <andrew@lunn.ch>
> Cc: David S. Miller <davem@davemloft.net>
> Cc: netdev@vger.kernel.org
> ---
> 
> Changes in v7: New patch
> 
>  .../ethernet/oki-semi/pch_gbe/pch_gbe_main.c  | 44 +++++++++----------
>  1 file changed, 22 insertions(+), 22 deletions(-)
> 
> diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
> index eb290c1edce0..721ce29b6467 100644
> --- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
> +++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
> @@ -1837,7 +1837,6 @@ static int pch_gbe_request_irq(struct pch_gbe_adapter *adapter)
>  int pch_gbe_up(struct pch_gbe_adapter *adapter)
>  {
>  	struct net_device *netdev = adapter->netdev;
> -	struct pch_gbe_tx_ring *tx_ring = adapter->tx_ring;
>  	struct pch_gbe_rx_ring *rx_ring = adapter->rx_ring;
>  	int err = -EINVAL;
>  
> @@ -1847,14 +1846,6 @@ int pch_gbe_up(struct pch_gbe_adapter *adapter)
>  		goto out;
>  	}
>  
> -	/* hardware has been reset, we need to reload some things */
> -	pch_gbe_set_multi(netdev);
> -
> -	pch_gbe_setup_tctl(adapter);
> -	pch_gbe_configure_tx(adapter);
> -	pch_gbe_setup_rctl(adapter);
> -	pch_gbe_configure_rx(adapter);
> -
>  	err = pch_gbe_request_irq(adapter);
>  	if (err) {
>  		netdev_err(netdev,
> @@ -1867,18 +1858,9 @@ int pch_gbe_up(struct pch_gbe_adapter *adapter)
>  			   "Error: can't bring device up - alloc rx buffers pool failed\n");
>  		goto freeirq;
>  	}
> -	pch_gbe_alloc_tx_buffers(adapter, tx_ring);
> -	pch_gbe_alloc_rx_buffers(adapter, rx_ring, rx_ring->count);
>  	adapter->tx_queue_len = netdev->tx_queue_len;
> -	pch_gbe_enable_dma_rx(&adapter->hw);
> -	pch_gbe_enable_mac_rx(&adapter->hw);
>  
>  	mod_timer(&adapter->watchdog_timer, jiffies);
> -
> -	napi_enable(&adapter->napi);
> -	pch_gbe_irq_enable(adapter);
> -	netif_start_queue(adapter->netdev);
> -
>  	return 0;
>  
>  freeirq:
> @@ -1930,6 +1912,8 @@ static void pch_gbe_watchdog(struct timer_list *t)
>  {
>  	struct pch_gbe_adapter *adapter = from_timer(adapter, t,
>  						     watchdog_timer);
> +	struct pch_gbe_rx_ring *rx_ring = adapter->rx_ring;
> +	struct pch_gbe_tx_ring *tx_ring = adapter->tx_ring;
>  	struct net_device *netdev = adapter->netdev;
>  	struct pch_gbe_hw *hw = &adapter->hw;
>  
> @@ -1950,12 +1934,32 @@ static void pch_gbe_watchdog(struct timer_list *t)
>  		}
>  		hw->mac.link_speed = ethtool_cmd_speed(&cmd);
>  		hw->mac.link_duplex = cmd.duplex;
> +
> +		pch_gbe_reset(adapter);
> +
>  		/* Set the RGMII control. */
>  		pch_gbe_set_rgmii_ctrl(adapter, hw->mac.link_speed,
>  				       hw->mac.link_duplex);
>  		/* Set the communication mode */
>  		pch_gbe_set_mode(adapter, hw->mac.link_speed,
>  				 hw->mac.link_duplex);
> +
> +		pch_gbe_set_multi(netdev);
> +		pch_gbe_setup_tctl(adapter);
> +		pch_gbe_configure_tx(adapter);
> +		pch_gbe_setup_rctl(adapter);
> +		pch_gbe_configure_rx(adapter);
> +
> +		pch_gbe_alloc_tx_buffers(adapter, tx_ring);
> +		pch_gbe_alloc_rx_buffers(adapter, rx_ring, rx_ring->count);
> +
> +		pch_gbe_enable_dma_rx(&adapter->hw);
> +		pch_gbe_enable_mac_rx(&adapter->hw);
> +
> +		napi_enable(&adapter->napi);
> +		pch_gbe_irq_enable(adapter);
> +		netif_start_queue(adapter->netdev);
> +
>  		netdev_dbg(netdev,
>  			   "Link is Up %d Mbps %s-Duplex\n",
>  			   hw->mac.link_speed,
> @@ -2568,7 +2572,6 @@ static int pch_gbe_probe(struct pci_dev *pdev,
>  			  (ETH_HLEN + ETH_FCS_LEN);
>  
>  	pch_gbe_mac_load_mac_addr(&adapter->hw);
> -	pch_gbe_mac_reset_hw(&adapter->hw);
>  
>  	/* setup the private structure */
>  	ret = pch_gbe_sw_init(adapter);
> @@ -2610,9 +2613,6 @@ static int pch_gbe_probe(struct pci_dev *pdev,
>  	adapter->wake_up_evt = PCH_GBE_WL_INIT_SETTING;
>  	dev_info(&pdev->dev, "MAC address : %pM\n", netdev->dev_addr);
>  
> -	/* reset the hardware with the new settings */
> -	pch_gbe_reset(adapter);
> -
>  	ret = register_netdev(netdev);
>  	if (ret)
>  		goto err_free_adapter;
> 


-- 
Florian

Re: [PATCH v7 06/11] net: pch_gbe: Only enable MAC when PHY link is active

[Paul Burton]

Hi Florian,

On Wed, Jun 27, 2018 at 10:54:24AM -0700, Florian Fainelli wrote:
> On 06/26/2018 05:06 PM, Paul Burton wrote:
> > When using a PHY connected via RGMII, as the pch_gbe driver presumes is
> > the case, the RX clock is provided by the PHY to the MAC. Various PHYs,
> > including both the AR8031 used by the Minnowboard & the RTL8211E used by
> > the MIPS Boston development board, will stop generating the RX clock
> > when the ethernet link is down (eg. the ethernet cable is unplugged).
> > 
> > Various pieces of functionality in the EG20T MAC, ranging from basics
> > like completing a MAC reset to programming MAC addresses, rely upon the
> > RX clock being provided. When the clock is not provided these pieces of
> > functionality simply never complete, and the busy bits that indicate
> > they're in progress remain set indefinitely.
> > 
> > The pch_gbe driver currently requires that the RX clock is always
> > provided, and attempts to enforce this by disabling the hibernation
> > feature of the AR8031 PHY to keep it generating the RX clock. This patch
> > moves us away from this model by only configuring the MAC when the PHY
> > indicates that the ethernet link is up. When the link is up we should be
> > able to safely expect that the RX clock is being provided, and therefore
> > safely reset & configure the MAC.
> 
> What we ended up doing in the bcmgenet driver is loop back the RX and TX
> clocks such that we always have a clock that we can use to perform any
> MAC operation, including reset.
> 
> Is this an option here?

That sounds like a nice solution, but I don't see a way to do it in the
EG20T datasheet[1].

> You might also want to split the allocation from the actual
> initialization if this is not done already.

Some of the buffer allocation is still happening in pch_gbe_up() rather
than when the link actually comes up, but there is more that could
probably be moved.

Thanks,
    Paul

[1] https://www.intel.com/content/www/us/en/intelligent-systems/queens-bay/platform-controller-hub-eg20t-datasheet.html

[PATCH v7 07/11] net: pch_gbe: Remove AR8031 PHY hibernation disable

[Paul Burton]

We should now be able to cope with the PHY entering hibernation, ie.
ceasing to provide the RX clock, whilst the ethernet link is down.

Remove the code responsible for disabling the AR8031 PHY's hibernation
feature, allowing the PHY to enter its low power hibernation state.

Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: David S. Miller <davem@davemloft.net>
Cc: netdev@vger.kernel.org
---

Changes in v7: New patch

 .../net/ethernet/oki-semi/pch_gbe/pch_gbe.h   |  2 -
 .../ethernet/oki-semi/pch_gbe/pch_gbe_main.c  |  5 ---
 .../ethernet/oki-semi/pch_gbe/pch_gbe_phy.c   | 42 -------------------
 .../ethernet/oki-semi/pch_gbe/pch_gbe_phy.h   |  1 -
 4 files changed, 50 deletions(-)

diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h
index 1bb0ea4f5503..f8acd8031951 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h
@@ -542,13 +542,11 @@ struct pch_gbe_hw_stats {
 /**
  * struct pch_gbe_privdata - PCI Device ID driver data
  * @phy_tx_clk_delay:		Bool, configure the PHY TX delay in software
- * @phy_disable_hibernate:	Bool, disable PHY hibernation
  * @platform_init:		Platform initialization callback, called from
  *				probe, prior to PHY initialization.
  */
 struct pch_gbe_privdata {
 	bool phy_tx_clk_delay;
-	bool phy_disable_hibernate;
 	int (*platform_init)(struct pci_dev *pdev);
 };
 
diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
index 721ce29b6467..c9b064ac06a1 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
@@ -2622,10 +2622,6 @@ static int pch_gbe_probe(struct pci_dev *pdev,
 
 	dev_dbg(&pdev->dev, "PCH Network Connection\n");
 
-	/* Disable hibernation on certain platforms */
-	if (adapter->pdata && adapter->pdata->phy_disable_hibernate)
-		pch_gbe_phy_disable_hibernate(&adapter->hw);
-
 	device_set_wakeup_enable(&pdev->dev, 1);
 	return 0;
 
@@ -2663,7 +2659,6 @@ static int pch_gbe_minnow_platform_init(struct pci_dev *pdev)
 
 static struct pch_gbe_privdata pch_gbe_minnow_privdata = {
 	.phy_tx_clk_delay = true,
-	.phy_disable_hibernate = true,
 	.platform_init = pch_gbe_minnow_platform_init,
 };
 
diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c
index 6b35b573beef..561e71880c29 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c
@@ -78,9 +78,7 @@
 #define PHY_AR8031_DBG_OFF      0x1D
 #define PHY_AR8031_DBG_DAT      0x1E
 #define PHY_AR8031_SERDES       0x05
-#define PHY_AR8031_HIBERNATE    0x0B
 #define PHY_AR8031_SERDES_TX_CLK_DLY   0x0100 /* TX clock delay of 2.0ns */
-#define PHY_AR8031_PS_HIB_EN           0x8000 /* Hibernate enable */
 
 /* Phy Id Register (word 2) */
 #define PHY_REVISION_MASK        0x000F
@@ -335,43 +333,3 @@ void pch_gbe_phy_init_setting(struct pch_gbe_hw *hw)
 	if (adapter->pdata && adapter->pdata->phy_tx_clk_delay)
 		pch_gbe_phy_tx_clk_delay(hw);
 }
-
-/**
- * pch_gbe_phy_disable_hibernate - Disable the PHY low power state
- * @hw:	            Pointer to the HW structure
- * Returns
- *	0:		Successful.
- *	-EINVAL:	Invalid argument.
- */
-int pch_gbe_phy_disable_hibernate(struct pch_gbe_hw *hw)
-{
-	struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
-	u16 mii_reg;
-	int ret = 0;
-
-	switch (hw->phy.id) {
-	case PHY_AR803X_ID:
-		netdev_dbg(adapter->netdev,
-			   "Disabling hibernation for AR803X PHY\n");
-		ret = pch_gbe_phy_write_reg_miic(hw, PHY_AR8031_DBG_OFF,
-						 PHY_AR8031_HIBERNATE);
-		if (ret)
-			break;
-
-		pch_gbe_phy_read_reg_miic(hw, PHY_AR8031_DBG_DAT, &mii_reg);
-		mii_reg &= ~PHY_AR8031_PS_HIB_EN;
-		ret = pch_gbe_phy_write_reg_miic(hw, PHY_AR8031_DBG_DAT,
-						 mii_reg);
-		break;
-	default:
-		netdev_err(adapter->netdev,
-			   "Unknown PHY (%x), could not disable hibernation\n",
-			   hw->phy.id);
-		return -EINVAL;
-	}
-
-	if (ret)
-		netdev_err(adapter->netdev,
-			   "Could not disable PHY hibernation\n");
-	return ret;
-}
diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.h b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.h
index 23ac38711619..a80644b4fce8 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.h
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.h
@@ -30,6 +30,5 @@ void pch_gbe_phy_power_up(struct pch_gbe_hw *hw);
 void pch_gbe_phy_power_down(struct pch_gbe_hw *hw);
 void pch_gbe_phy_set_rgmii(struct pch_gbe_hw *hw);
 void pch_gbe_phy_init_setting(struct pch_gbe_hw *hw);
-int pch_gbe_phy_disable_hibernate(struct pch_gbe_hw *hw);
 
 #endif /* _PCH_GBE_PHY_H_ */
-- 
2.18.0

Re: [PATCH v7 07/11] net: pch_gbe: Remove AR8031 PHY hibernation disable

[Andrew Lunn]

On Tue, Jun 26, 2018 at 05:06:08PM -0700, Paul Burton wrote:
> We should now be able to cope with the PHY entering hibernation, ie.
> ceasing to provide the RX clock, whilst the ethernet link is down.
> 
> Remove the code responsible for disabling the AR8031 PHY's hibernation
> feature, allowing the PHY to enter its low power hibernation state.
> 
> Signed-off-by: Paul Burton <paul.burton@mips.com>
> Cc: Andrew Lunn <andrew@lunn.ch>
> Cc: David S. Miller <davem@davemloft.net>
> Cc: netdev@vger.kernel.org

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

[PATCH v7 08/11] net: pch_gbe: Clean up resets

[Paul Burton]

Currently pch_gbe_reset() performs a number of tasks:

  1) Calls pch_gbe_reset_hw(), which:

     1a) Reads the MAC address from the hardware, even though we already
         did that in pch_gbe_open() & it should not have changed.

     1b) Writes to the RESET register to reset the MAC.

     1c) Writes the MODE register to configure GMII/RGMII mode,
         potentially before the MAC reset has finished.

     1d) Polls for the completion of the MAC reset.

     1e) Configures the device MAC address.

  2) Calls pch_gbe_set_multi() to configure multicast addresses &
     hardware MAC filtering.

  3) Calls pch_gbe_mac_init_rx_addrs(), which:

     3a) Configures the device MAC address again, duplicating step 1e.

     3b) Masks & clears all other MAC registers, wiping out the
         configuration performed by step 2.

This is needlessly repetitive & split across 3 functions for no good
reason. This patch cleans this up significantly by:

  a) Inlining pch_gbe_mac_reset_hw() into pch_gbe_reset(), moving the
     MODE register write to after the MAC reset has completed & removing
     the initial read of the MAC address.

  b) Removing pch_gbe_mac_init_rx_addrs() entirely, leaving the
     address configuration performed by pch_gbe_set_multi() intact.

With this done we know that pch_gbe_reset() will leave us with the
multicast MAC addresses & filtering configured correctly, so we can
remove the call to pch_gbe_set_multi() in pch_gbe_watchdog().

Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: David S. Miller <davem@davemloft.net>
Cc: netdev@vger.kernel.org
---

Changes in v7: New patch

 .../ethernet/oki-semi/pch_gbe/pch_gbe_main.c  | 54 ++++---------------
 1 file changed, 11 insertions(+), 43 deletions(-)

diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
index c9b064ac06a1..123c7818698d 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
@@ -357,22 +357,6 @@ static void pch_gbe_mac_mar_set(struct pch_gbe_hw *hw, u8 * addr, u32 index)
 	pch_gbe_wait_clr_bit(&hw->reg->ADDR_MASK, PCH_GBE_BUSY);
 }
 
-/**
- * pch_gbe_mac_reset_hw - Reset hardware
- * @hw:	Pointer to the HW structure
- */
-static void pch_gbe_mac_reset_hw(struct pch_gbe_hw *hw)
-{
-	/* Read the MAC address. and store to the private data */
-	pch_gbe_mac_read_mac_addr(hw);
-	iowrite32(PCH_GBE_ALL_RST, &hw->reg->RESET);
-	iowrite32(PCH_GBE_MODE_GMII_ETHER, &hw->reg->MODE);
-	pch_gbe_wait_clr_bit(&hw->reg->RESET, PCH_GBE_ALL_RST);
-	/* Setup the receive addresses */
-	pch_gbe_mac_mar_set(hw, hw->mac.addr, 0);
-	return;
-}
-
 static void pch_gbe_disable_mac_rx(struct pch_gbe_hw *hw)
 {
 	u32 rctl;
@@ -389,28 +373,6 @@ static void pch_gbe_enable_mac_rx(struct pch_gbe_hw *hw)
 	iowrite32((rctl | PCH_GBE_MRE_MAC_RX_EN), &hw->reg->MAC_RX_EN);
 }
 
-/**
- * pch_gbe_mac_init_rx_addrs - Initialize receive address's
- * @hw:	Pointer to the HW structure
- * @mar_count: Receive address registers
- */
-static void pch_gbe_mac_init_rx_addrs(struct pch_gbe_hw *hw, u16 mar_count)
-{
-	u32 i;
-
-	/* Setup the receive address */
-	pch_gbe_mac_mar_set(hw, hw->mac.addr, 0);
-
-	/* Zero out the other receive addresses */
-	for (i = 1; i < mar_count; i++) {
-		iowrite32(0, &hw->reg->mac_adr[i].high);
-		iowrite32(0, &hw->reg->mac_adr[i].low);
-	}
-	iowrite32(0xFFFE, &hw->reg->ADDR_MASK);
-	/* wait busy */
-	pch_gbe_wait_clr_bit(&hw->reg->ADDR_MASK, PCH_GBE_BUSY);
-}
-
 /**
  * pch_gbe_mac_force_mac_fc - Force the MAC's flow control settings
  * @hw:	            Pointer to the HW structure
@@ -734,11 +696,18 @@ void pch_gbe_reset(struct pch_gbe_adapter *adapter)
 	struct net_device *netdev = adapter->netdev;
 	struct pch_gbe_hw *hw = &adapter->hw;
 
-	pch_gbe_mac_reset_hw(hw);
-	/* reprogram multicast address register after reset */
+	/* Perform the reset & wait for it to complete */
+	iowrite32(PCH_GBE_ALL_RST, &hw->reg->RESET);
+	pch_gbe_wait_clr_bit(&hw->reg->RESET, PCH_GBE_ALL_RST);
+
+	/* Configure GMII/RGMII mode */
+	iowrite32(PCH_GBE_MODE_GMII_ETHER, &hw->reg->MODE);
+
+	/* Program the MAC address */
+	pch_gbe_mac_mar_set(hw, hw->mac.addr, 0);
+
+	/* Configure multicast addresses & filtering */
 	pch_gbe_set_multi(netdev);
-	/* Setup the receive address. */
-	pch_gbe_mac_init_rx_addrs(hw, PCH_GBE_MAR_ENTRIES);
 }
 
 /**
@@ -1944,7 +1913,6 @@ static void pch_gbe_watchdog(struct timer_list *t)
 		pch_gbe_set_mode(adapter, hw->mac.link_speed,
 				 hw->mac.link_duplex);
 
-		pch_gbe_set_multi(netdev);
 		pch_gbe_setup_tctl(adapter);
 		pch_gbe_configure_tx(adapter);
 		pch_gbe_setup_rctl(adapter);
-- 
2.18.0

[PATCH v7 09/11] net: pch_gbe: Convert to mdiobus and phylib

[Paul Burton]

From: Andrew Lunn <andrew@lunn.ch>

Convert this driver to use the mdio bus and phylib infrastructure. It
will then use the common AT803X PHY driver, rather than use its own
code. Have the shared code also handle the GPIO used to reset the PHY.

Over all, these changes should make it easier to use other PHYs with the
MAC chip, and reduces the lines of code.

[paul.burton@mips.com:
  - Select CONFIG_PHYLIB.
  - Drop selection of CONFIG_MII.
  - Imply AT803X_PHY for X86_32, rather than selecting it for all.
  - Add GPIOF_ACTIVE_LOW to the minnow PHY reset GPIO flags.
  - Rebase atop changes in the rest of the series.
  - Drop the AR8031 PHY hibernation disable fixup.]

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: David S. Miller <davem@davemloft.net>
Cc: netdev@vger.kernel.org

---

Changes in v7:
- Heavy rebasing atop earlier patches.

Changes in v6:
- New patch

 drivers/net/ethernet/oki-semi/pch_gbe/Kconfig |   3 +-
 .../net/ethernet/oki-semi/pch_gbe/Makefile    |   2 +-
 .../net/ethernet/oki-semi/pch_gbe/pch_gbe.h   |   7 +-
 .../oki-semi/pch_gbe/pch_gbe_ethtool.c        |  88 +----
 .../ethernet/oki-semi/pch_gbe/pch_gbe_main.c  | 239 ++++++-------
 .../ethernet/oki-semi/pch_gbe/pch_gbe_param.c | 265 --------------
 .../ethernet/oki-semi/pch_gbe/pch_gbe_phy.c   | 335 ------------------
 .../ethernet/oki-semi/pch_gbe/pch_gbe_phy.h   |  34 --
 8 files changed, 126 insertions(+), 847 deletions(-)
 delete mode 100644 drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c
 delete mode 100644 drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.h

diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/Kconfig b/drivers/net/ethernet/oki-semi/pch_gbe/Kconfig
index 5f7a35212796..5276f4ff3b63 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/Kconfig
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/Kconfig
@@ -5,7 +5,8 @@
 config PCH_GBE
 	tristate "OKI SEMICONDUCTOR IOH(ML7223/ML7831) GbE"
 	depends on PCI && (X86_32 || COMPILE_TEST)
-	select MII
+	select PHYLIB
+	imply AT803X_PHY if X86_32
 	select PTP_1588_CLOCK_PCH
 	select NET_PTP_CLASSIFY
 	---help---
diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/Makefile b/drivers/net/ethernet/oki-semi/pch_gbe/Makefile
index 862de0f3bc41..133c89bc2933 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/Makefile
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/Makefile
@@ -1,4 +1,4 @@
 obj-$(CONFIG_PCH_GBE) += pch_gbe.o
 
-pch_gbe-y := pch_gbe_phy.o pch_gbe_ethtool.o pch_gbe_param.o
+pch_gbe-y := pch_gbe_ethtool.o pch_gbe_param.o
 pch_gbe-y += pch_gbe_main.o
diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h
index f8acd8031951..e6a0bd053ae5 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h
@@ -22,7 +22,8 @@
 
 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 
-#include <linux/mii.h>
+#include <linux/mdio.h>
+#include <linux/phy.h>
 #include <linux/delay.h>
 #include <linux/pci.h>
 #include <linux/netdevice.h>
@@ -578,8 +579,8 @@ struct pch_gbe_adapter {
 	struct pch_gbe_hw hw;
 	struct pch_gbe_hw_stats stats;
 	struct work_struct reset_task;
-	struct mii_if_info mii;
-	struct timer_list watchdog_timer;
+	struct mii_bus *mdiobus;
+	struct phy_device *phydev;
 	u32 wake_up_evt;
 	struct pch_gbe_tx_ring *tx_ring;
 	struct pch_gbe_rx_ring *rx_ring;
diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_ethtool.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_ethtool.c
index adaa0024adfe..5dc08eccb7e6 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_ethtool.c
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_ethtool.c
@@ -17,7 +17,6 @@
  * along with this program; if not, see <http://www.gnu.org/licenses/>.
  */
 #include "pch_gbe.h"
-#include "pch_gbe_phy.h"
 
 /**
  * pch_gbe_stats - Stats item information
@@ -71,41 +70,8 @@ static const struct pch_gbe_stats pch_gbe_gstrings_stats[] = {
 #define PCH_GBE_STATS_LEN (PCH_GBE_GLOBAL_STATS_LEN + PCH_GBE_QUEUE_STATS_LEN)
 
 #define PCH_GBE_MAC_REGS_LEN    (sizeof(struct pch_gbe_regs) / 4)
+#define PCH_GBE_PHY_REGS_LEN	32
 #define PCH_GBE_REGS_LEN        (PCH_GBE_MAC_REGS_LEN + PCH_GBE_PHY_REGS_LEN)
-/**
- * pch_gbe_get_link_ksettings - Get device-specific settings
- * @netdev: Network interface device structure
- * @ecmd:   Ethtool command
- * Returns:
- *	0:			Successful.
- *	Negative value:		Failed.
- */
-static int pch_gbe_get_link_ksettings(struct net_device *netdev,
-				      struct ethtool_link_ksettings *ecmd)
-{
-	struct pch_gbe_adapter *adapter = netdev_priv(netdev);
-	u32 supported, advertising;
-
-	mii_ethtool_get_link_ksettings(&adapter->mii, ecmd);
-
-	ethtool_convert_link_mode_to_legacy_u32(&supported,
-						ecmd->link_modes.supported);
-	ethtool_convert_link_mode_to_legacy_u32(&advertising,
-						ecmd->link_modes.advertising);
-
-	supported &= ~(SUPPORTED_TP | SUPPORTED_1000baseT_Half);
-	advertising &= ~(ADVERTISED_TP | ADVERTISED_1000baseT_Half);
-
-	ethtool_convert_legacy_u32_to_link_mode(ecmd->link_modes.supported,
-						supported);
-	ethtool_convert_legacy_u32_to_link_mode(ecmd->link_modes.advertising,
-						advertising);
-
-	if (!netif_carrier_ok(adapter->netdev))
-		ecmd->base.speed = SPEED_UNKNOWN;
-
-	return 0;
-}
 
 /**
  * pch_gbe_set_link_ksettings - Set device-specific settings
@@ -119,34 +85,22 @@ static int pch_gbe_set_link_ksettings(struct net_device *netdev,
 				      const struct ethtool_link_ksettings *ecmd)
 {
 	struct pch_gbe_adapter *adapter = netdev_priv(netdev);
+	struct phy_device *phydev = adapter->phydev;
 	struct pch_gbe_hw *hw = &adapter->hw;
-	struct ethtool_link_ksettings copy_ecmd;
-	u32 speed = ecmd->base.speed;
 	u32 advertising;
 	int ret;
 
-	pch_gbe_phy_write_reg_miic(hw, MII_BMCR, BMCR_RESET);
-
-	memcpy(&copy_ecmd, ecmd, sizeof(*ecmd));
-
-	/* when set_settings() is called with a ethtool_cmd previously
-	 * filled by get_settings() on a down link, speed is -1: */
-	if (speed == UINT_MAX) {
-		speed = SPEED_1000;
-		copy_ecmd.base.speed = speed;
-		copy_ecmd.base.duplex = DUPLEX_FULL;
-	}
-	ret = mii_ethtool_set_link_ksettings(&adapter->mii, &copy_ecmd);
+	ret = phy_ethtool_set_link_ksettings(netdev, ecmd);
 	if (ret) {
-		netdev_err(netdev, "Error: mii_ethtool_set_link_ksettings\n");
+		netdev_err(netdev, "Error: phy_ethtool_set_link_ksettings\n");
 		return ret;
 	}
-	hw->mac.link_speed = speed;
-	hw->mac.link_duplex = copy_ecmd.base.duplex;
+	hw->mac.link_speed = phydev->speed;
+	hw->mac.link_duplex = phydev->duplex;
 	ethtool_convert_link_mode_to_legacy_u32(
-		&advertising, copy_ecmd.link_modes.advertising);
+		&advertising, ecmd->link_modes.advertising);
 	hw->phy.autoneg_advertised = advertising;
-	hw->mac.autoneg = copy_ecmd.base.autoneg;
+	hw->mac.autoneg = ecmd->base.autoneg;
 
 	/* reset the link */
 	if (netif_running(adapter->netdev)) {
@@ -197,16 +151,14 @@ static void pch_gbe_get_regs(struct net_device *netdev,
 	struct pch_gbe_hw *hw = &adapter->hw;
 	struct pci_dev *pdev = adapter->pdev;
 	u32 *regs_buff = p;
-	u16 i, tmp;
+	u16 i;
 
 	regs->version = 0x1000000 | (__u32)pdev->revision << 16 | pdev->device;
 	for (i = 0; i < PCH_GBE_MAC_REGS_LEN; i++)
 		*regs_buff++ = ioread32(&hw->reg->INT_ST + i);
 	/* PHY register */
-	for (i = 0; i < PCH_GBE_PHY_REGS_LEN; i++) {
-		pch_gbe_phy_read_reg_miic(&adapter->hw, i, &tmp);
-		*regs_buff++ = tmp;
-	}
+	for (i = 0; i < PCH_GBE_PHY_REGS_LEN; i++)
+		*regs_buff++ = phy_read(adapter->phydev, i);
 }
 
 /**
@@ -261,20 +213,6 @@ static int pch_gbe_set_wol(struct net_device *netdev,
 	return 0;
 }
 
-/**
- * pch_gbe_nway_reset - Restart autonegotiation
- * @netdev: Network interface device structure
- * Returns:
- *	0:			Successful.
- *	Negative value:		Failed.
- */
-static int pch_gbe_nway_reset(struct net_device *netdev)
-{
-	struct pch_gbe_adapter *adapter = netdev_priv(netdev);
-
-	return mii_nway_restart(&adapter->mii);
-}
-
 /**
  * pch_gbe_get_ringparam - Report ring sizes
  * @netdev:  Network interface device structure
@@ -497,7 +435,7 @@ static const struct ethtool_ops pch_gbe_ethtool_ops = {
 	.get_regs = pch_gbe_get_regs,
 	.get_wol = pch_gbe_get_wol,
 	.set_wol = pch_gbe_set_wol,
-	.nway_reset = pch_gbe_nway_reset,
+	.nway_reset = phy_ethtool_nway_reset,
 	.get_link = ethtool_op_get_link,
 	.get_ringparam = pch_gbe_get_ringparam,
 	.set_ringparam = pch_gbe_set_ringparam,
@@ -506,7 +444,7 @@ static const struct ethtool_ops pch_gbe_ethtool_ops = {
 	.get_strings = pch_gbe_get_strings,
 	.get_ethtool_stats = pch_gbe_get_ethtool_stats,
 	.get_sset_count = pch_gbe_get_sset_count,
-	.get_link_ksettings = pch_gbe_get_link_ksettings,
+	.get_link_ksettings = phy_ethtool_get_link_ksettings,
 	.set_link_ksettings = pch_gbe_set_link_ksettings,
 };
 
diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
index 123c7818698d..7fd10550cc57 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
@@ -18,11 +18,11 @@
  */
 
 #include "pch_gbe.h"
-#include "pch_gbe_phy.h"
 #include <linux/module.h>
 #include <linux/net_tstamp.h>
 #include <linux/ptp_classify.h>
 #include <linux/gpio.h>
+#include <linux/gpio/consumer.h>
 
 #define DRV_VERSION     "1.01"
 const char pch_driver_version[] = DRV_VERSION;
@@ -33,7 +33,6 @@ const char pch_driver_version[] = DRV_VERSION;
 #define DSC_INIT16			0xC000
 #define PCH_GBE_DMA_ALIGN		0
 #define PCH_GBE_DMA_PADDING		2
-#define PCH_GBE_WATCHDOG_PERIOD		(5 * HZ)	/* watchdog time */
 #define PCH_GBE_PCI_BAR			1
 #define PCH_GBE_RESERVE_MEMORY		0x200000	/* 2MB */
 
@@ -112,9 +111,8 @@ const char pch_driver_version[] = DRV_VERSION;
 
 #define MINNOW_PHY_RESET_GPIO		13
 
-static int pch_gbe_mdio_read(struct net_device *netdev, int addr, int reg);
-static void pch_gbe_mdio_write(struct net_device *netdev, int addr, int reg,
-			       int data);
+#define	PCH_GBE_PHY_RESET_DELAY_US	10
+
 static void pch_gbe_set_multi(struct net_device *netdev);
 
 static int pch_ptp_match(struct sk_buff *skb, u16 uid_hi, u32 uid_lo, u16 seqid)
@@ -569,66 +567,6 @@ static void pch_gbe_init_stats(struct pch_gbe_adapter *adapter)
 	return;
 }
 
-/**
- * pch_gbe_init_phy - Initialize PHY
- * @adapter:  Board private structure to initialize
- * Returns:
- *	0:	Successfully
- *	Negative value:	Failed
- */
-static int pch_gbe_init_phy(struct pch_gbe_adapter *adapter)
-{
-	struct net_device *netdev = adapter->netdev;
-	struct pch_gbe_hw *hw = &adapter->hw;
-	u32 addr;
-	u16 bmcr, stat;
-	s32 ret_val;
-
-	/* Discover phy addr by searching addrs in order {1,0,2,..., 31} */
-	for (addr = 0; addr < PCH_GBE_PHY_REGS_LEN; addr++) {
-		adapter->mii.phy_id = (addr == 0) ? 1 : (addr == 1) ? 0 : addr;
-		bmcr = pch_gbe_mdio_read(netdev, adapter->mii.phy_id, MII_BMCR);
-		stat = pch_gbe_mdio_read(netdev, adapter->mii.phy_id, MII_BMSR);
-		stat = pch_gbe_mdio_read(netdev, adapter->mii.phy_id, MII_BMSR);
-		if (!((bmcr == 0xFFFF) || ((stat == 0) && (bmcr == 0))))
-			break;
-	}
-	adapter->hw.phy.addr = adapter->mii.phy_id;
-	netdev_dbg(netdev, "phy_addr = %d\n", adapter->mii.phy_id);
-	if (addr == PCH_GBE_PHY_REGS_LEN)
-		return -EAGAIN;
-	/* Selected the phy and isolate the rest */
-	for (addr = 0; addr < PCH_GBE_PHY_REGS_LEN; addr++) {
-		if (addr != adapter->mii.phy_id) {
-			pch_gbe_mdio_write(netdev, addr, MII_BMCR,
-					   BMCR_ISOLATE);
-		} else {
-			bmcr = pch_gbe_mdio_read(netdev, addr, MII_BMCR);
-			pch_gbe_mdio_write(netdev, addr, MII_BMCR,
-					   bmcr & ~BMCR_ISOLATE);
-		}
-	}
-
-	/* MII setup */
-	adapter->mii.phy_id_mask = 0x1F;
-	adapter->mii.reg_num_mask = 0x1F;
-	adapter->mii.dev = adapter->netdev;
-	adapter->mii.mdio_read = pch_gbe_mdio_read;
-	adapter->mii.mdio_write = pch_gbe_mdio_write;
-	adapter->mii.supports_gmii = mii_check_gmii_support(&adapter->mii);
-
-	ret_val = pch_gbe_phy_get_id(hw);
-	if (ret_val) {
-		netdev_err(adapter->netdev, "pch_gbe_phy_get_id error\n");
-		return -EIO;
-	}
-	pch_gbe_phy_init_setting(hw);
-	/* Setup Mac interface option RGMII */
-	pch_gbe_phy_set_rgmii(hw);
-
-	return 0;
-}
-
 /**
  * pch_gbe_mdio_read - The read function for mii
  * @netdev: Network interface device structure
@@ -638,13 +576,12 @@ static int pch_gbe_init_phy(struct pch_gbe_adapter *adapter)
  *	0:	Successfully
  *	Negative value:	Failed
  */
-static int pch_gbe_mdio_read(struct net_device *netdev, int addr, int reg)
+static int pch_gbe_mdio_read(struct mii_bus *bus, int addr, int reg)
 {
-	struct pch_gbe_adapter *adapter = netdev_priv(netdev);
+	struct pch_gbe_adapter *adapter = bus->priv;
 	struct pch_gbe_hw *hw = &adapter->hw;
 
-	return pch_gbe_mac_ctrl_miim(hw, addr, PCH_GBE_HAL_MIIM_READ, reg,
-				     (u16) 0);
+	return pch_gbe_mac_ctrl_miim(hw, addr, PCH_GBE_HAL_MIIM_READ, reg, 0);
 }
 
 /**
@@ -654,13 +591,34 @@ static int pch_gbe_mdio_read(struct net_device *netdev, int addr, int reg)
  * @reg:    Access location
  * @data:   Write data
  */
-static void pch_gbe_mdio_write(struct net_device *netdev,
-			       int addr, int reg, int data)
+static int pch_gbe_mdio_write(struct mii_bus *bus, int addr, int reg, u16 data)
 {
-	struct pch_gbe_adapter *adapter = netdev_priv(netdev);
+	struct pch_gbe_adapter *adapter = bus->priv;
 	struct pch_gbe_hw *hw = &adapter->hw;
 
-	pch_gbe_mac_ctrl_miim(hw, addr, PCH_GBE_HAL_MIIM_WRITE, reg, data);
+	return pch_gbe_mac_ctrl_miim(hw, addr, PCH_GBE_HAL_MIIM_WRITE, reg,
+				     data);
+}
+
+static int pch_gbe_init_mdio(struct pch_gbe_adapter *adapter)
+{
+	struct device *dev = &adapter->pdev->dev;
+	struct mii_bus *bus;
+
+	bus = devm_mdiobus_alloc(dev);
+	if (!bus)
+		return -ENOMEM;
+
+	bus->read = pch_gbe_mdio_read;
+	bus->write = pch_gbe_mdio_write;
+	bus->parent = dev;
+	bus->name = "pch_gbe";
+	snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mii", dev_name(dev));
+	bus->priv = adapter;
+
+	adapter->mdiobus = bus;
+
+	return mdiobus_register(bus);
 }
 
 /**
@@ -1829,7 +1787,6 @@ int pch_gbe_up(struct pch_gbe_adapter *adapter)
 	}
 	adapter->tx_queue_len = netdev->tx_queue_len;
 
-	mod_timer(&adapter->watchdog_timer, jiffies);
 	return 0;
 
 freeirq:
@@ -1855,8 +1812,6 @@ void pch_gbe_down(struct pch_gbe_adapter *adapter)
 	pch_gbe_irq_disable(adapter);
 	pch_gbe_free_irq(adapter);
 
-	del_timer_sync(&adapter->watchdog_timer);
-
 	netdev->tx_queue_len = adapter->tx_queue_len;
 	netif_carrier_off(netdev);
 	netif_stop_queue(netdev);
@@ -1877,32 +1832,22 @@ void pch_gbe_down(struct pch_gbe_adapter *adapter)
  * pch_gbe_watchdog - Watchdog process
  * @data:  Board private structure
  */
-static void pch_gbe_watchdog(struct timer_list *t)
+static void pch_gbe_change_link(struct net_device *netdev)
 {
-	struct pch_gbe_adapter *adapter = from_timer(adapter, t,
-						     watchdog_timer);
+	struct pch_gbe_adapter *adapter = netdev_priv(netdev);
 	struct pch_gbe_rx_ring *rx_ring = adapter->rx_ring;
 	struct pch_gbe_tx_ring *tx_ring = adapter->tx_ring;
-	struct net_device *netdev = adapter->netdev;
+	struct phy_device *phydev = adapter->phydev;
 	struct pch_gbe_hw *hw = &adapter->hw;
 
 	netdev_dbg(netdev, "right now = %ld\n", jiffies);
 
 	pch_gbe_update_stats(adapter);
-	if ((mii_link_ok(&adapter->mii)) && (!netif_carrier_ok(netdev))) {
-		struct ethtool_cmd cmd = { .cmd = ETHTOOL_GSET };
 
+	if (phydev->link) {
 		netdev->tx_queue_len = adapter->tx_queue_len;
-		/* mii library handles link maintenance tasks */
-		if (mii_ethtool_gset(&adapter->mii, &cmd)) {
-			netdev_err(netdev, "ethtool get setting Error\n");
-			mod_timer(&adapter->watchdog_timer,
-				  round_jiffies(jiffies +
-						PCH_GBE_WATCHDOG_PERIOD));
-			return;
-		}
-		hw->mac.link_speed = ethtool_cmd_speed(&cmd);
-		hw->mac.link_duplex = cmd.duplex;
+		hw->mac.link_speed = phydev->speed;
+		hw->mac.link_duplex = phydev->duplex;
 
 		pch_gbe_reset(adapter);
 
@@ -1927,23 +1872,43 @@ static void pch_gbe_watchdog(struct timer_list *t)
 		napi_enable(&adapter->napi);
 		pch_gbe_irq_enable(adapter);
 		netif_start_queue(adapter->netdev);
-
-		netdev_dbg(netdev,
-			   "Link is Up %d Mbps %s-Duplex\n",
-			   hw->mac.link_speed,
-			   cmd.duplex == DUPLEX_FULL ? "Full" : "Half");
-		netif_carrier_on(netdev);
 		netif_wake_queue(netdev);
-	} else if ((!mii_link_ok(&adapter->mii)) &&
-		   (netif_carrier_ok(netdev))) {
-		netdev_dbg(netdev, "NIC Link is Down\n");
+	} else if (!phydev->link && netif_carrier_ok(netdev)) {
 		hw->mac.link_speed = SPEED_10;
 		hw->mac.link_duplex = DUPLEX_HALF;
-		netif_carrier_off(netdev);
 		netif_stop_queue(netdev);
 	}
-	mod_timer(&adapter->watchdog_timer,
-		  round_jiffies(jiffies + PCH_GBE_WATCHDOG_PERIOD));
+
+	phy_print_status(phydev);
+}
+
+/**
+ * pch_gbe_init_phy - Initialize PHY
+ * @adapter:  Board private structure to initialize
+ * Returns:
+ *	0:	Successfully
+ *	Negative value:	Failed
+ */
+static int pch_gbe_init_phy(struct pch_gbe_adapter *adapter)
+{
+	struct net_device *netdev = adapter->netdev;
+	int ret;
+
+	adapter->phydev = phy_find_first(adapter->mdiobus);
+	if (!adapter->phydev)
+		return -ENODEV;
+
+	if (adapter->pdata && adapter->pdata->platform_init)
+		adapter->pdata->platform_init(adapter->pdev);
+
+	ret = phy_connect_direct(netdev, adapter->phydev, pch_gbe_change_link,
+				 PHY_INTERFACE_MODE_RGMII_TXID);
+	if (ret) {
+		netdev_err(netdev, "Could not attach to PHY\n");
+		return ret;
+	}
+
+	return 0;
 }
 
 /**
@@ -1990,7 +1955,6 @@ static int pch_gbe_sw_init(struct pch_gbe_adapter *adapter)
 static int pch_gbe_open(struct net_device *netdev)
 {
 	struct pch_gbe_adapter *adapter = netdev_priv(netdev);
-	struct pch_gbe_hw *hw = &adapter->hw;
 	int err;
 
 	/* allocate transmit descriptors */
@@ -2001,7 +1965,7 @@ static int pch_gbe_open(struct net_device *netdev)
 	err = pch_gbe_setup_rx_resources(adapter, adapter->rx_ring);
 	if (err)
 		goto err_setup_rx;
-	pch_gbe_phy_power_up(hw);
+	phy_start(adapter->phydev);
 	err = pch_gbe_up(adapter);
 	if (err)
 		goto err_up;
@@ -2010,7 +1974,7 @@ static int pch_gbe_open(struct net_device *netdev)
 
 err_up:
 	if (!adapter->wake_up_evt)
-		pch_gbe_phy_power_down(hw);
+		phy_stop(adapter->phydev);
 	pch_gbe_free_rx_resources(adapter, adapter->rx_ring);
 err_setup_rx:
 	pch_gbe_free_tx_resources(adapter, adapter->tx_ring);
@@ -2029,11 +1993,10 @@ static int pch_gbe_open(struct net_device *netdev)
 static int pch_gbe_stop(struct net_device *netdev)
 {
 	struct pch_gbe_adapter *adapter = netdev_priv(netdev);
-	struct pch_gbe_hw *hw = &adapter->hw;
 
 	pch_gbe_down(adapter);
 	if (!adapter->wake_up_evt)
-		pch_gbe_phy_power_down(hw);
+		phy_stop(adapter->phydev);
 	pch_gbe_free_tx_resources(adapter, adapter->tx_ring);
 	pch_gbe_free_rx_resources(adapter, adapter->rx_ring);
 	return 0;
@@ -2245,7 +2208,7 @@ static int pch_gbe_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
 	if (cmd == SIOCSHWTSTAMP)
 		return hwtstamp_ioctl(netdev, ifr, cmd);
 
-	return generic_mii_ioctl(&adapter->mii, if_mii(ifr), cmd, NULL);
+	return phy_mii_ioctl(adapter->phydev, ifr, cmd);
 }
 
 /**
@@ -2363,7 +2326,7 @@ static pci_ers_result_t pch_gbe_io_slot_reset(struct pci_dev *pdev)
 	}
 	pci_set_master(pdev);
 	pci_enable_wake(pdev, PCI_D0, 0);
-	pch_gbe_phy_power_up(hw);
+	phy_start(adapter->phydev);
 	pch_gbe_reset(adapter);
 	/* Clear wake up status */
 	pch_gbe_mac_set_wol_event(hw, 0);
@@ -2408,7 +2371,7 @@ static int __pch_gbe_suspend(struct pci_dev *pdev)
 		pch_gbe_mac_set_wol_event(hw, wufc);
 		pci_disable_device(pdev);
 	} else {
-		pch_gbe_phy_power_down(hw);
+		phy_stop(adapter->phydev);
 		pch_gbe_mac_set_wol_event(hw, wufc);
 		pci_disable_device(pdev);
 	}
@@ -2437,7 +2400,7 @@ static int pch_gbe_resume(struct device *device)
 		return err;
 	}
 	pci_set_master(pdev);
-	pch_gbe_phy_power_up(hw);
+	phy_start(adapter->phydev);
 	pch_gbe_reset(adapter);
 	/* Clear wake on lan control and status */
 	pch_gbe_mac_set_wol_event(hw, 0);
@@ -2467,7 +2430,9 @@ static void pch_gbe_remove(struct pci_dev *pdev)
 	cancel_work_sync(&adapter->reset_task);
 	unregister_netdev(netdev);
 
-	pch_gbe_phy_hw_reset(&adapter->hw);
+	phy_stop(adapter->phydev);
+	phy_detach(adapter->phydev);
+	mdiobus_unregister(adapter->mdiobus);
 
 	free_netdev(netdev);
 }
@@ -2517,8 +2482,6 @@ static int pch_gbe_probe(struct pci_dev *pdev,
 	adapter->hw.back = adapter;
 	adapter->hw.reg = pcim_iomap_table(pdev)[PCH_GBE_PCI_BAR];
 	adapter->pdata = (struct pch_gbe_privdata *)pci_id->driver_data;
-	if (adapter->pdata && adapter->pdata->platform_init)
-		adapter->pdata->platform_init(pdev);
 
 	adapter->ptp_pdev =
 		pci_get_domain_bus_and_slot(pci_domain_nr(adapter->pdev->bus),
@@ -2526,7 +2489,6 @@ static int pch_gbe_probe(struct pci_dev *pdev,
 					    PCI_DEVFN(12, 4));
 
 	netdev->netdev_ops = &pch_gbe_netdev_ops;
-	netdev->watchdog_timeo = PCH_GBE_WATCHDOG_PERIOD;
 	netif_napi_add(netdev, &adapter->napi,
 		       pch_gbe_napi_poll, PCH_GBE_RX_WEIGHT);
 	netdev->hw_features = NETIF_F_RXCSUM |
@@ -2548,18 +2510,24 @@ static int pch_gbe_probe(struct pci_dev *pdev,
 
 	pch_gbe_check_options(adapter);
 
+	ret = pch_gbe_init_mdio(adapter);
+	if (ret) {
+		dev_err(&pdev->dev, "MDIO initialize error\n");
+		goto err_free_netdev;
+	}
+
 	/* Initialize PHY */
 	ret = pch_gbe_init_phy(adapter);
 	if (ret) {
 		dev_err(&pdev->dev, "PHY initialize error\n");
-		goto err_free_adapter;
+		goto err_free_mdiobus;
 	}
 
 	/* Read the MAC address. and store to the private data */
 	ret = pch_gbe_mac_read_mac_addr(&adapter->hw);
 	if (ret) {
 		dev_err(&pdev->dev, "MAC address Read Error\n");
-		goto err_free_adapter;
+		goto err_free_phy;
 	}
 
 	memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
@@ -2573,7 +2541,6 @@ static int pch_gbe_probe(struct pci_dev *pdev,
 		dev_err(&pdev->dev, "Invalid MAC address, "
 		                    "interface disabled.\n");
 	}
-	timer_setup(&adapter->watchdog_timer, pch_gbe_watchdog, 0);
 
 	INIT_WORK(&adapter->reset_task, pch_gbe_reset_task);
 
@@ -2583,7 +2550,8 @@ static int pch_gbe_probe(struct pci_dev *pdev,
 
 	ret = register_netdev(netdev);
 	if (ret)
-		goto err_free_adapter;
+		goto err_free_phy;
+
 	/* tell the stack to leave us alone until pch_gbe_open() is called */
 	netif_carrier_off(netdev);
 	netif_stop_queue(netdev);
@@ -2593,8 +2561,10 @@ static int pch_gbe_probe(struct pci_dev *pdev,
 	device_set_wakeup_enable(&pdev->dev, 1);
 	return 0;
 
-err_free_adapter:
-	pch_gbe_phy_hw_reset(&adapter->hw);
+err_free_phy:
+	phy_disconnect(adapter->phydev);
+err_free_mdiobus:
+	mdiobus_unregister(adapter->mdiobus);
 err_free_netdev:
 	free_netdev(netdev);
 	return ret;
@@ -2605,23 +2575,26 @@ static int pch_gbe_probe(struct pci_dev *pdev,
  */
 static int pch_gbe_minnow_platform_init(struct pci_dev *pdev)
 {
-	unsigned long flags = GPIOF_DIR_OUT | GPIOF_INIT_HIGH | GPIOF_EXPORT;
+	unsigned long flags = GPIOF_DIR_OUT | GPIOF_INIT_HIGH |
+		GPIOF_EXPORT | GPIOF_ACTIVE_LOW;
+	struct net_device *netdev = pci_get_drvdata(pdev);
+	struct pch_gbe_adapter *adapter = netdev_priv(netdev);
+	struct phy_device *phydev = adapter->phydev;
+	struct device *dev = &adapter->pdev->dev;
 	unsigned gpio = MINNOW_PHY_RESET_GPIO;
 	int ret;
 
-	ret = devm_gpio_request_one(&pdev->dev, gpio, flags,
-				    "minnow_phy_reset");
+	ret = devm_gpio_request_one(dev, gpio, flags, "minnow_phy_reset");
 	if (ret) {
-		dev_err(&pdev->dev,
-			"ERR: Can't request PHY reset GPIO line '%d'\n", gpio);
+		netdev_err(netdev,
+			   "ERR: Can't request PHY reset GPIO line '%d'\n",
+			   gpio);
 		return ret;
 	}
 
-	gpio_set_value(gpio, 0);
-	usleep_range(1250, 1500);
-	gpio_set_value(gpio, 1);
-	usleep_range(1250, 1500);
-
+	phydev->mdio.reset = gpio_to_desc(gpio);
+	phydev->mdio.reset_assert_delay = 1500;
+	phydev->mdio.reset_deassert_delay = 1500;
 	return ret;
 }
 
diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_param.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_param.c
index e097e6baaac4..c1fd66cadc76 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_param.c
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_param.c
@@ -42,60 +42,6 @@ static int RxDescriptors = OPTION_UNSET;
 module_param(RxDescriptors, int, 0);
 MODULE_PARM_DESC(RxDescriptors, "Number of receive descriptors");
 
-/**
- * Speed - User Specified Speed Override
- * @Valid Range: 0, 10, 100, 1000
- *   - 0:    auto-negotiate at all supported speeds
- *   - 10:   only link at 10 Mbps
- *   - 100:  only link at 100 Mbps
- *   - 1000: only link at 1000 Mbps
- * @Default Value: 0
- */
-static int Speed = OPTION_UNSET;
-module_param(Speed, int, 0);
-MODULE_PARM_DESC(Speed, "Speed setting");
-
-/**
- * Duplex - User Specified Duplex Override
- * @Valid Range: 0-2
- *   - 0:  auto-negotiate for duplex
- *   - 1:  only link at half duplex
- *   - 2:  only link at full duplex
- * @Default Value: 0
- */
-static int Duplex = OPTION_UNSET;
-module_param(Duplex, int, 0);
-MODULE_PARM_DESC(Duplex, "Duplex setting");
-
-#define HALF_DUPLEX 1
-#define FULL_DUPLEX 2
-
-/**
- * AutoNeg - Auto-negotiation Advertisement Override
- * @Valid Range: 0x01-0x0F, 0x20-0x2F
- *
- *       The AutoNeg value is a bit mask describing which speed and duplex
- *       combinations should be advertised during auto-negotiation.
- *       The supported speed and duplex modes are listed below
- *
- *       Bit           7     6     5      4      3     2     1      0
- *       Speed (Mbps)  N/A   N/A   1000   N/A    100   100   10     10
- *       Duplex                    Full          Full  Half  Full   Half
- *
- * @Default Value: 0x2F (copper)
- */
-static int AutoNeg = OPTION_UNSET;
-module_param(AutoNeg, int, 0);
-MODULE_PARM_DESC(AutoNeg, "Advertised auto-negotiation setting");
-
-#define PHY_ADVERTISE_10_HALF      0x0001
-#define PHY_ADVERTISE_10_FULL      0x0002
-#define PHY_ADVERTISE_100_HALF     0x0004
-#define PHY_ADVERTISE_100_FULL     0x0008
-#define PHY_ADVERTISE_1000_HALF    0x0010 /* Not used, just FYI */
-#define PHY_ADVERTISE_1000_FULL    0x0020
-#define PCH_AUTONEG_ADVERTISE_DEFAULT   0x2F
-
 /**
  * FlowControl - User Specified Flow Control Override
  * @Valid Range: 0-3
@@ -159,54 +105,6 @@ struct pch_gbe_option {
 	} arg;
 };
 
-static const struct pch_gbe_opt_list speed_list[] = {
-	{ 0, "" },
-	{ SPEED_10, "" },
-	{ SPEED_100, "" },
-	{ SPEED_1000, "" }
-};
-
-static const struct pch_gbe_opt_list dplx_list[] = {
-	{ 0, "" },
-	{ HALF_DUPLEX, "" },
-	{ FULL_DUPLEX, "" }
-};
-
-static const struct pch_gbe_opt_list an_list[] =
-	#define AA "AutoNeg advertising "
-	{{ 0x01, AA "10/HD" },
-	 { 0x02, AA "10/FD" },
-	 { 0x03, AA "10/FD, 10/HD" },
-	 { 0x04, AA "100/HD" },
-	 { 0x05, AA "100/HD, 10/HD" },
-	 { 0x06, AA "100/HD, 10/FD" },
-	 { 0x07, AA "100/HD, 10/FD, 10/HD" },
-	 { 0x08, AA "100/FD" },
-	 { 0x09, AA "100/FD, 10/HD" },
-	 { 0x0a, AA "100/FD, 10/FD" },
-	 { 0x0b, AA "100/FD, 10/FD, 10/HD" },
-	 { 0x0c, AA "100/FD, 100/HD" },
-	 { 0x0d, AA "100/FD, 100/HD, 10/HD" },
-	 { 0x0e, AA "100/FD, 100/HD, 10/FD" },
-	 { 0x0f, AA "100/FD, 100/HD, 10/FD, 10/HD" },
-	 { 0x20, AA "1000/FD" },
-	 { 0x21, AA "1000/FD, 10/HD" },
-	 { 0x22, AA "1000/FD, 10/FD" },
-	 { 0x23, AA "1000/FD, 10/FD, 10/HD" },
-	 { 0x24, AA "1000/FD, 100/HD" },
-	 { 0x25, AA "1000/FD, 100/HD, 10/HD" },
-	 { 0x26, AA "1000/FD, 100/HD, 10/FD" },
-	 { 0x27, AA "1000/FD, 100/HD, 10/FD, 10/HD" },
-	 { 0x28, AA "1000/FD, 100/FD" },
-	 { 0x29, AA "1000/FD, 100/FD, 10/HD" },
-	 { 0x2a, AA "1000/FD, 100/FD, 10/FD" },
-	 { 0x2b, AA "1000/FD, 100/FD, 10/FD, 10/HD" },
-	 { 0x2c, AA "1000/FD, 100/FD, 100/HD" },
-	 { 0x2d, AA "1000/FD, 100/FD, 100/HD, 10/HD" },
-	 { 0x2e, AA "1000/FD, 100/FD, 100/HD, 10/FD" },
-	 { 0x2f, AA "1000/FD, 100/FD, 100/HD, 10/FD, 10/HD" }
-};
-
 static const struct pch_gbe_opt_list fc_list[] = {
 	{ PCH_GBE_FC_NONE, "Flow Control Disabled" },
 	{ PCH_GBE_FC_RX_PAUSE, "Flow Control Receive Only" },
@@ -275,167 +173,6 @@ static int pch_gbe_validate_option(int *value,
 	return -1;
 }
 
-/**
- * pch_gbe_check_copper_options - Range Checking for Link Options, Copper Version
- * @adapter:  Board private structure
- */
-static void pch_gbe_check_copper_options(struct pch_gbe_adapter *adapter)
-{
-	struct pch_gbe_hw *hw = &adapter->hw;
-	int speed, dplx;
-
-	{ /* Speed */
-		static const struct pch_gbe_option opt = {
-			.type = list_option,
-			.name = "Speed",
-			.err  = "parameter ignored",
-			.def  = 0,
-			.arg  = { .l = { .nr = (int)ARRAY_SIZE(speed_list),
-					 .p = speed_list } }
-		};
-		speed = Speed;
-		pch_gbe_validate_option(&speed, &opt, adapter);
-	}
-	{ /* Duplex */
-		static const struct pch_gbe_option opt = {
-			.type = list_option,
-			.name = "Duplex",
-			.err  = "parameter ignored",
-			.def  = 0,
-			.arg  = { .l = { .nr = (int)ARRAY_SIZE(dplx_list),
-					 .p = dplx_list } }
-		};
-		dplx = Duplex;
-		pch_gbe_validate_option(&dplx, &opt, adapter);
-	}
-
-	{ /* Autoneg */
-		static const struct pch_gbe_option opt = {
-			.type = list_option,
-			.name = "AutoNeg",
-			.err  = "parameter ignored",
-			.def  = PCH_AUTONEG_ADVERTISE_DEFAULT,
-			.arg  = { .l = { .nr = (int)ARRAY_SIZE(an_list),
-					 .p = an_list} }
-		};
-		if (speed || dplx) {
-			netdev_dbg(adapter->netdev,
-				   "AutoNeg specified along with Speed or Duplex, AutoNeg parameter ignored\n");
-			hw->phy.autoneg_advertised = opt.def;
-		} else {
-			int tmp = AutoNeg;
-
-			pch_gbe_validate_option(&tmp, &opt, adapter);
-			hw->phy.autoneg_advertised = tmp;
-		}
-	}
-
-	switch (speed + dplx) {
-	case 0:
-		hw->mac.autoneg = hw->mac.fc_autoneg = 1;
-		if ((speed || dplx))
-			netdev_dbg(adapter->netdev,
-				   "Speed and duplex autonegotiation enabled\n");
-		hw->mac.link_speed = SPEED_10;
-		hw->mac.link_duplex = DUPLEX_HALF;
-		break;
-	case HALF_DUPLEX:
-		netdev_dbg(adapter->netdev,
-			   "Half Duplex specified without Speed\n");
-		netdev_dbg(adapter->netdev,
-			   "Using Autonegotiation at Half Duplex only\n");
-		hw->mac.autoneg = hw->mac.fc_autoneg = 1;
-		hw->phy.autoneg_advertised = PHY_ADVERTISE_10_HALF |
-						PHY_ADVERTISE_100_HALF;
-		hw->mac.link_speed = SPEED_10;
-		hw->mac.link_duplex = DUPLEX_HALF;
-		break;
-	case FULL_DUPLEX:
-		netdev_dbg(adapter->netdev,
-			   "Full Duplex specified without Speed\n");
-		netdev_dbg(adapter->netdev,
-			   "Using Autonegotiation at Full Duplex only\n");
-		hw->mac.autoneg = hw->mac.fc_autoneg = 1;
-		hw->phy.autoneg_advertised = PHY_ADVERTISE_10_FULL |
-						PHY_ADVERTISE_100_FULL |
-						PHY_ADVERTISE_1000_FULL;
-		hw->mac.link_speed = SPEED_10;
-		hw->mac.link_duplex = DUPLEX_FULL;
-		break;
-	case SPEED_10:
-		netdev_dbg(adapter->netdev,
-			   "10 Mbps Speed specified without Duplex\n");
-		netdev_dbg(adapter->netdev,
-			   "Using Autonegotiation at 10 Mbps only\n");
-		hw->mac.autoneg = hw->mac.fc_autoneg = 1;
-		hw->phy.autoneg_advertised = PHY_ADVERTISE_10_HALF |
-						PHY_ADVERTISE_10_FULL;
-		hw->mac.link_speed = SPEED_10;
-		hw->mac.link_duplex = DUPLEX_HALF;
-		break;
-	case SPEED_10 + HALF_DUPLEX:
-		netdev_dbg(adapter->netdev, "Forcing to 10 Mbps Half Duplex\n");
-		hw->mac.autoneg = hw->mac.fc_autoneg = 0;
-		hw->phy.autoneg_advertised = 0;
-		hw->mac.link_speed = SPEED_10;
-		hw->mac.link_duplex = DUPLEX_HALF;
-		break;
-	case SPEED_10 + FULL_DUPLEX:
-		netdev_dbg(adapter->netdev, "Forcing to 10 Mbps Full Duplex\n");
-		hw->mac.autoneg = hw->mac.fc_autoneg = 0;
-		hw->phy.autoneg_advertised = 0;
-		hw->mac.link_speed = SPEED_10;
-		hw->mac.link_duplex = DUPLEX_FULL;
-		break;
-	case SPEED_100:
-		netdev_dbg(adapter->netdev,
-			   "100 Mbps Speed specified without Duplex\n");
-		netdev_dbg(adapter->netdev,
-			   "Using Autonegotiation at 100 Mbps only\n");
-		hw->mac.autoneg = hw->mac.fc_autoneg = 1;
-		hw->phy.autoneg_advertised = PHY_ADVERTISE_100_HALF |
-						PHY_ADVERTISE_100_FULL;
-		hw->mac.link_speed = SPEED_100;
-		hw->mac.link_duplex = DUPLEX_HALF;
-		break;
-	case SPEED_100 + HALF_DUPLEX:
-		netdev_dbg(adapter->netdev,
-			   "Forcing to 100 Mbps Half Duplex\n");
-		hw->mac.autoneg = hw->mac.fc_autoneg = 0;
-		hw->phy.autoneg_advertised = 0;
-		hw->mac.link_speed = SPEED_100;
-		hw->mac.link_duplex = DUPLEX_HALF;
-		break;
-	case SPEED_100 + FULL_DUPLEX:
-		netdev_dbg(adapter->netdev,
-			   "Forcing to 100 Mbps Full Duplex\n");
-		hw->mac.autoneg = hw->mac.fc_autoneg = 0;
-		hw->phy.autoneg_advertised = 0;
-		hw->mac.link_speed = SPEED_100;
-		hw->mac.link_duplex = DUPLEX_FULL;
-		break;
-	case SPEED_1000:
-		netdev_dbg(adapter->netdev,
-			   "1000 Mbps Speed specified without Duplex\n");
-		goto full_duplex_only;
-	case SPEED_1000 + HALF_DUPLEX:
-		netdev_dbg(adapter->netdev,
-			   "Half Duplex is not supported at 1000 Mbps\n");
-		/* fall through */
-	case SPEED_1000 + FULL_DUPLEX:
-full_duplex_only:
-		netdev_dbg(adapter->netdev,
-			   "Using Autonegotiation at 1000 Mbps Full Duplex only\n");
-		hw->mac.autoneg = hw->mac.fc_autoneg = 1;
-		hw->phy.autoneg_advertised = PHY_ADVERTISE_1000_FULL;
-		hw->mac.link_speed = SPEED_1000;
-		hw->mac.link_duplex = DUPLEX_FULL;
-		break;
-	default:
-		BUG();
-	}
-}
-
 /**
  * pch_gbe_check_options - Range Checking for Command Line Parameters
  * @adapter:  Board private structure
@@ -516,6 +253,4 @@ void pch_gbe_check_options(struct pch_gbe_adapter *adapter)
 		pch_gbe_validate_option(&tmp, &opt, adapter);
 		hw->mac.fc = tmp;
 	}
-
-	pch_gbe_check_copper_options(adapter);
 }
diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c
deleted file mode 100644
index 561e71880c29..000000000000
--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c
+++ /dev/null
@@ -1,335 +0,0 @@
-/*
- * Copyright (C) 1999 - 2010 Intel Corporation.
- * Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD.
- *
- * This code was derived from the Intel e1000e Linux driver.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, see <http://www.gnu.org/licenses/>.
- */
-
-#include "pch_gbe.h"
-#include "pch_gbe_phy.h"
-
-#define PHY_MAX_REG_ADDRESS   0x1F	/* 5 bit address bus (0-0x1F) */
-
-/* PHY 1000 MII Register/Bit Definitions */
-/* PHY Registers defined by IEEE */
-#define PHY_CONTROL           0x00  /* Control Register */
-#define PHY_STATUS            0x01  /* Status Regiser */
-#define PHY_ID1               0x02  /* Phy Id Register (word 1) */
-#define PHY_ID2               0x03  /* Phy Id Register (word 2) */
-#define PHY_AUTONEG_ADV       0x04  /* Autoneg Advertisement */
-#define PHY_LP_ABILITY        0x05  /* Link Partner Ability (Base Page) */
-#define PHY_AUTONEG_EXP       0x06  /* Autoneg Expansion Register */
-#define PHY_NEXT_PAGE_TX      0x07  /* Next Page TX */
-#define PHY_LP_NEXT_PAGE      0x08  /* Link Partner Next Page */
-#define PHY_1000T_CTRL        0x09  /* 1000Base-T Control Register */
-#define PHY_1000T_STATUS      0x0A  /* 1000Base-T Status Register */
-#define PHY_EXT_STATUS        0x0F  /* Extended Status Register */
-#define PHY_PHYSP_CONTROL     0x10  /* PHY Specific Control Register */
-#define PHY_EXT_PHYSP_CONTROL 0x14  /* Extended PHY Specific Control Register */
-#define PHY_LED_CONTROL       0x18  /* LED Control Register */
-#define PHY_EXT_PHYSP_STATUS  0x1B  /* Extended PHY Specific Status Register */
-
-/* PHY Control Register */
-#define MII_CR_SPEED_SELECT_MSB 0x0040	/* bits 6,13: 10=1000, 01=100, 00=10 */
-#define MII_CR_COLL_TEST_ENABLE 0x0080	/* Collision test enable */
-#define MII_CR_FULL_DUPLEX      0x0100	/* FDX =1, half duplex =0 */
-#define MII_CR_RESTART_AUTO_NEG 0x0200	/* Restart auto negotiation */
-#define MII_CR_ISOLATE          0x0400	/* Isolate PHY from MII */
-#define MII_CR_POWER_DOWN       0x0800	/* Power down */
-#define MII_CR_AUTO_NEG_EN      0x1000	/* Auto Neg Enable */
-#define MII_CR_SPEED_SELECT_LSB 0x2000	/* bits 6,13: 10=1000, 01=100, 00=10 */
-#define MII_CR_LOOPBACK         0x4000	/* 0 = normal, 1 = loopback */
-#define MII_CR_RESET            0x8000	/* 0 = normal, 1 = PHY reset */
-#define MII_CR_SPEED_1000       0x0040
-#define MII_CR_SPEED_100        0x2000
-#define MII_CR_SPEED_10         0x0000
-
-/* PHY Status Register */
-#define MII_SR_EXTENDED_CAPS     0x0001	/* Extended register capabilities */
-#define MII_SR_JABBER_DETECT     0x0002	/* Jabber Detected */
-#define MII_SR_LINK_STATUS       0x0004	/* Link Status 1 = link */
-#define MII_SR_AUTONEG_CAPS      0x0008	/* Auto Neg Capable */
-#define MII_SR_REMOTE_FAULT      0x0010	/* Remote Fault Detect */
-#define MII_SR_AUTONEG_COMPLETE  0x0020	/* Auto Neg Complete */
-#define MII_SR_PREAMBLE_SUPPRESS 0x0040	/* Preamble may be suppressed */
-#define MII_SR_EXTENDED_STATUS   0x0100	/* Ext. status info in Reg 0x0F */
-#define MII_SR_100T2_HD_CAPS     0x0200	/* 100T2 Half Duplex Capable */
-#define MII_SR_100T2_FD_CAPS     0x0400	/* 100T2 Full Duplex Capable */
-#define MII_SR_10T_HD_CAPS       0x0800	/* 10T   Half Duplex Capable */
-#define MII_SR_10T_FD_CAPS       0x1000	/* 10T   Full Duplex Capable */
-#define MII_SR_100X_HD_CAPS      0x2000	/* 100X  Half Duplex Capable */
-#define MII_SR_100X_FD_CAPS      0x4000	/* 100X  Full Duplex Capable */
-#define MII_SR_100T4_CAPS        0x8000	/* 100T4 Capable */
-
-/* AR8031 PHY Debug Registers */
-#define PHY_AR803X_ID           0x00001374
-#define PHY_AR8031_DBG_OFF      0x1D
-#define PHY_AR8031_DBG_DAT      0x1E
-#define PHY_AR8031_SERDES       0x05
-#define PHY_AR8031_SERDES_TX_CLK_DLY   0x0100 /* TX clock delay of 2.0ns */
-
-/* Phy Id Register (word 2) */
-#define PHY_REVISION_MASK        0x000F
-
-/* PHY Specific Control Register */
-#define PHYSP_CTRL_ASSERT_CRS_TX  0x0800
-
-
-/* Default value of PHY register */
-#define PHY_CONTROL_DEFAULT         0x1140 /* Control Register */
-#define PHY_AUTONEG_ADV_DEFAULT     0x01e0 /* Autoneg Advertisement */
-#define PHY_NEXT_PAGE_TX_DEFAULT    0x2001 /* Next Page TX */
-#define PHY_1000T_CTRL_DEFAULT      0x0300 /* 1000Base-T Control Register */
-#define PHY_PHYSP_CONTROL_DEFAULT   0x01EE /* PHY Specific Control Register */
-
-/**
- * pch_gbe_phy_get_id - Retrieve the PHY ID and revision
- * @hw:	       Pointer to the HW structure
- * Returns
- *	0:			Successful.
- *	Negative value:		Failed.
- */
-s32 pch_gbe_phy_get_id(struct pch_gbe_hw *hw)
-{
-	struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
-	struct pch_gbe_phy_info *phy = &hw->phy;
-	s32 ret;
-	u16 phy_id1;
-	u16 phy_id2;
-
-	ret = pch_gbe_phy_read_reg_miic(hw, PHY_ID1, &phy_id1);
-	if (ret)
-		return ret;
-	ret = pch_gbe_phy_read_reg_miic(hw, PHY_ID2, &phy_id2);
-	if (ret)
-		return ret;
-	/*
-	 * PHY_ID1: [bit15-0:ID(21-6)]
-	 * PHY_ID2: [bit15-10:ID(5-0)][bit9-4:Model][bit3-0:revision]
-	 */
-	phy->id = (u32)phy_id1;
-	phy->id = ((phy->id << 6) | ((phy_id2 & 0xFC00) >> 10));
-	phy->revision = (u32) (phy_id2 & 0x000F);
-	netdev_dbg(adapter->netdev,
-		   "phy->id : 0x%08x  phy->revision : 0x%08x\n",
-		   phy->id, phy->revision);
-	return 0;
-}
-
-/**
- * pch_gbe_phy_read_reg_miic - Read MII control register
- * @hw:	     Pointer to the HW structure
- * @offset:  Register offset to be read
- * @data:    Pointer to the read data
- * Returns
- *	0:		Successful.
- *	-EINVAL:	Invalid argument.
- */
-s32 pch_gbe_phy_read_reg_miic(struct pch_gbe_hw *hw, u32 offset, u16 *data)
-{
-	struct pch_gbe_phy_info *phy = &hw->phy;
-
-	if (offset > PHY_MAX_REG_ADDRESS) {
-		struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
-
-		netdev_err(adapter->netdev, "PHY Address %d is out of range\n",
-			   offset);
-		return -EINVAL;
-	}
-	*data = pch_gbe_mac_ctrl_miim(hw, phy->addr, PCH_GBE_HAL_MIIM_READ,
-				      offset, (u16)0);
-	return 0;
-}
-
-/**
- * pch_gbe_phy_write_reg_miic - Write MII control register
- * @hw:	     Pointer to the HW structure
- * @offset:  Register offset to be read
- * @data:    data to write to register at offset
- * Returns
- *	0:		Successful.
- *	-EINVAL:	Invalid argument.
- */
-s32 pch_gbe_phy_write_reg_miic(struct pch_gbe_hw *hw, u32 offset, u16 data)
-{
-	struct pch_gbe_phy_info *phy = &hw->phy;
-
-	if (offset > PHY_MAX_REG_ADDRESS) {
-		struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
-
-		netdev_err(adapter->netdev, "PHY Address %d is out of range\n",
-			   offset);
-		return -EINVAL;
-	}
-	pch_gbe_mac_ctrl_miim(hw, phy->addr, PCH_GBE_HAL_MIIM_WRITE,
-				 offset, data);
-	return 0;
-}
-
-/**
- * pch_gbe_phy_sw_reset - PHY software reset
- * @hw:	            Pointer to the HW structure
- */
-static void pch_gbe_phy_sw_reset(struct pch_gbe_hw *hw)
-{
-	u16 phy_ctrl;
-
-	pch_gbe_phy_read_reg_miic(hw, PHY_CONTROL, &phy_ctrl);
-	phy_ctrl |= MII_CR_RESET;
-	pch_gbe_phy_write_reg_miic(hw, PHY_CONTROL, phy_ctrl);
-	udelay(1);
-}
-
-/**
- * pch_gbe_phy_hw_reset - PHY hardware reset
- * @hw:	   Pointer to the HW structure
- */
-void pch_gbe_phy_hw_reset(struct pch_gbe_hw *hw)
-{
-	pch_gbe_phy_write_reg_miic(hw, PHY_CONTROL, PHY_CONTROL_DEFAULT);
-	pch_gbe_phy_write_reg_miic(hw, PHY_AUTONEG_ADV,
-					PHY_AUTONEG_ADV_DEFAULT);
-	pch_gbe_phy_write_reg_miic(hw, PHY_NEXT_PAGE_TX,
-					PHY_NEXT_PAGE_TX_DEFAULT);
-	pch_gbe_phy_write_reg_miic(hw, PHY_1000T_CTRL, PHY_1000T_CTRL_DEFAULT);
-	pch_gbe_phy_write_reg_miic(hw, PHY_PHYSP_CONTROL,
-					PHY_PHYSP_CONTROL_DEFAULT);
-}
-
-/**
- * pch_gbe_phy_power_up - restore link in case the phy was powered down
- * @hw:	   Pointer to the HW structure
- */
-void pch_gbe_phy_power_up(struct pch_gbe_hw *hw)
-{
-	u16 mii_reg;
-
-	mii_reg = 0;
-	/* Just clear the power down bit to wake the phy back up */
-	/* according to the manual, the phy will retain its
-	 * settings across a power-down/up cycle */
-	pch_gbe_phy_read_reg_miic(hw, PHY_CONTROL, &mii_reg);
-	mii_reg &= ~MII_CR_POWER_DOWN;
-	pch_gbe_phy_write_reg_miic(hw, PHY_CONTROL, mii_reg);
-}
-
-/**
- * pch_gbe_phy_power_down - Power down PHY
- * @hw:	   Pointer to the HW structure
- */
-void pch_gbe_phy_power_down(struct pch_gbe_hw *hw)
-{
-	u16 mii_reg;
-
-	mii_reg = 0;
-	/* Power down the PHY so no link is implied when interface is down *
-	 * The PHY cannot be powered down if any of the following is TRUE *
-	 * (a) WoL is enabled
-	 * (b) AMT is active
-	 */
-	pch_gbe_phy_read_reg_miic(hw, PHY_CONTROL, &mii_reg);
-	mii_reg |= MII_CR_POWER_DOWN;
-	pch_gbe_phy_write_reg_miic(hw, PHY_CONTROL, mii_reg);
-	mdelay(1);
-}
-
-/**
- * pch_gbe_phy_set_rgmii - RGMII interface setting
- * @hw:	            Pointer to the HW structure
- */
-void pch_gbe_phy_set_rgmii(struct pch_gbe_hw *hw)
-{
-	pch_gbe_phy_sw_reset(hw);
-}
-
-/**
- * pch_gbe_phy_tx_clk_delay - Setup TX clock delay via the PHY
- * @hw:	            Pointer to the HW structure
- * Returns
- *	0:		Successful.
- *	-EINVAL:	Invalid argument.
- */
-static int pch_gbe_phy_tx_clk_delay(struct pch_gbe_hw *hw)
-{
-	/* The RGMII interface requires a ~2ns TX clock delay. This is typically
-	 * done in layout with a longer trace or via PHY strapping, but can also
-	 * be done via PHY configuration registers.
-	 */
-	struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
-	u16 mii_reg;
-	int ret = 0;
-
-	switch (hw->phy.id) {
-	case PHY_AR803X_ID:
-		netdev_dbg(adapter->netdev,
-			   "Configuring AR803X PHY for 2ns TX clock delay\n");
-		pch_gbe_phy_read_reg_miic(hw, PHY_AR8031_DBG_OFF, &mii_reg);
-		ret = pch_gbe_phy_write_reg_miic(hw, PHY_AR8031_DBG_OFF,
-						 PHY_AR8031_SERDES);
-		if (ret)
-			break;
-
-		pch_gbe_phy_read_reg_miic(hw, PHY_AR8031_DBG_DAT, &mii_reg);
-		mii_reg |= PHY_AR8031_SERDES_TX_CLK_DLY;
-		ret = pch_gbe_phy_write_reg_miic(hw, PHY_AR8031_DBG_DAT,
-						 mii_reg);
-		break;
-	default:
-		netdev_err(adapter->netdev,
-			   "Unknown PHY (%x), could not set TX clock delay\n",
-			   hw->phy.id);
-		return -EINVAL;
-	}
-
-	if (ret)
-		netdev_err(adapter->netdev,
-			   "Could not configure tx clock delay for PHY\n");
-	return ret;
-}
-
-/**
- * pch_gbe_phy_init_setting - PHY initial setting
- * @hw:	            Pointer to the HW structure
- */
-void pch_gbe_phy_init_setting(struct pch_gbe_hw *hw)
-{
-	struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
-	struct ethtool_cmd     cmd = { .cmd = ETHTOOL_GSET };
-	int ret;
-	u16 mii_reg;
-
-	ret = mii_ethtool_gset(&adapter->mii, &cmd);
-	if (ret)
-		netdev_err(adapter->netdev, "Error: mii_ethtool_gset\n");
-
-	ethtool_cmd_speed_set(&cmd, hw->mac.link_speed);
-	cmd.duplex = hw->mac.link_duplex;
-	cmd.advertising = hw->phy.autoneg_advertised;
-	cmd.autoneg = hw->mac.autoneg;
-	pch_gbe_phy_write_reg_miic(hw, MII_BMCR, BMCR_RESET);
-	ret = mii_ethtool_sset(&adapter->mii, &cmd);
-	if (ret)
-		netdev_err(adapter->netdev, "Error: mii_ethtool_sset\n");
-
-	pch_gbe_phy_sw_reset(hw);
-
-	pch_gbe_phy_read_reg_miic(hw, PHY_PHYSP_CONTROL, &mii_reg);
-	mii_reg |= PHYSP_CTRL_ASSERT_CRS_TX;
-	pch_gbe_phy_write_reg_miic(hw, PHY_PHYSP_CONTROL, mii_reg);
-
-	/* Setup a TX clock delay on certain platforms */
-	if (adapter->pdata && adapter->pdata->phy_tx_clk_delay)
-		pch_gbe_phy_tx_clk_delay(hw);
-}
diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.h b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.h
deleted file mode 100644
index a80644b4fce8..000000000000
--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Copyright (C) 1999 - 2010 Intel Corporation.
- * Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD.
- *
- * This code was derived from the Intel e1000e Linux driver.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, see <http://www.gnu.org/licenses/>.
- */
-#ifndef _PCH_GBE_PHY_H_
-#define _PCH_GBE_PHY_H_
-
-#define PCH_GBE_PHY_REGS_LEN		32
-#define	PCH_GBE_PHY_RESET_DELAY_US	10
-
-s32 pch_gbe_phy_get_id(struct pch_gbe_hw *hw);
-s32 pch_gbe_phy_read_reg_miic(struct pch_gbe_hw *hw, u32 offset, u16 *data);
-s32 pch_gbe_phy_write_reg_miic(struct pch_gbe_hw *hw, u32 offset, u16 data);
-void pch_gbe_phy_hw_reset(struct pch_gbe_hw *hw);
-void pch_gbe_phy_power_up(struct pch_gbe_hw *hw);
-void pch_gbe_phy_power_down(struct pch_gbe_hw *hw);
-void pch_gbe_phy_set_rgmii(struct pch_gbe_hw *hw);
-void pch_gbe_phy_init_setting(struct pch_gbe_hw *hw);
-
-#endif /* _PCH_GBE_PHY_H_ */
-- 
2.18.0

Re: [PATCH v7 09/11] net: pch_gbe: Convert to mdiobus and phylib

[Andrew Lunn]

> @@ -5,7 +5,8 @@
>  config PCH_GBE
>  	tristate "OKI SEMICONDUCTOR IOH(ML7223/ML7831) GbE"
>  	depends on PCI && (X86_32 || COMPILE_TEST)
> -	select MII
> +	select PHYLIB
> +	imply AT803X_PHY if X86_32
>  	select PTP_1588_CLOCK_PCH
>  	select NET_PTP_CLASSIFY

That is unusual. I don't think any other MAC driver does this.

If the AT803X driver is not available, it will fall back to the
generic PHY driver. That means RGMII delays will not get set
correctly, no interrupts, no wol, and no workaround for the 8030.

Are any of these relevant to your board?

> @@ -197,16 +151,14 @@ static void pch_gbe_get_regs(struct net_device *netdev,
>  	struct pch_gbe_hw *hw = &adapter->hw;
>  	struct pci_dev *pdev = adapter->pdev;
>  	u32 *regs_buff = p;
> -	u16 i, tmp;
> +	u16 i;
>  
>  	regs->version = 0x1000000 | (__u32)pdev->revision << 16 | pdev->device;
>  	for (i = 0; i < PCH_GBE_MAC_REGS_LEN; i++)
>  		*regs_buff++ = ioread32(&hw->reg->INT_ST + i);
>  	/* PHY register */
> -	for (i = 0; i < PCH_GBE_PHY_REGS_LEN; i++) {
> -		pch_gbe_phy_read_reg_miic(&adapter->hw, i, &tmp);
> -		*regs_buff++ = tmp;
> -	}
> +	for (i = 0; i < PCH_GBE_PHY_REGS_LEN; i++)
> +		*regs_buff++ = phy_read(adapter->phydev, i);
>  }

In general, that is not safe. Some PHYs have pages, and you have no
idea what page is currently selected. If you don't need it, i would
drop this. There are other ways to get access to phy registers, like
miitool, which should do a better job.

	 Andrew

Re: [PATCH v7 09/11] net: pch_gbe: Convert to mdiobus and phylib

[Paul Burton]

Hi Andrew,

On Wed, Jun 27, 2018 at 07:51:44PM +0200, Andrew Lunn wrote:
> > @@ -5,7 +5,8 @@
> >  config PCH_GBE
> >  	tristate "OKI SEMICONDUCTOR IOH(ML7223/ML7831) GbE"
> >  	depends on PCI && (X86_32 || COMPILE_TEST)
> > -	select MII
> > +	select PHYLIB
> > +	imply AT803X_PHY if X86_32
> >  	select PTP_1588_CLOCK_PCH
> >  	select NET_PTP_CLASSIFY
> 
> That is unusual. I don't think any other MAC driver does this.
> 
> If the AT803X driver is not available, it will fall back to the
> generic PHY driver. That means RGMII delays will not get set
> correctly, no interrupts, no wol, and no workaround for the 8030.
> 
> Are any of these relevant to your board?

Well, my board uses an RTL8211E PHY, doesn't support suspending so WoL
isn't applicable & with this series isn't yet using PHY interrupts
(though that would be ideal as a later addition). So for my board I
enable CONFIG_REALTEK_PHY & I don't have CONFIG_AT8031X_PHY enabled.

It seems the Minnowboard uses the AT8031 PHY, but it's not the only X86
board that includes the EG20T & not all of those use the AT8031. For
example I have access to an Aaeon NanoCOM-TC module[1] which uses the
EG20T & pch_gbe, but its datasheet lists an RTL8211CL PHY (which is
presumably misconfigured by current kernels, though at least for basic
network access is functional).

The idea behind using imply was that it allows kernel configurations
that have up to now only supported the AT8031 PHY via pch_gbe's custom
code to automatically continue to support that PHY, but also allows
support for it to be disabled for systems that do not use that PHY (for
example mine or the Aaeon system).

Would you prefer that the MAC driver instead selects the PHY drivers for
all PHYs known to have been used with the MAC? Or would you be happy if
I added the equivalent in patch 11:

  imply REALTEK_PHY if MIPS

Though perhaps REALTEK_PHY would be good to enable for X86_32 too to
cover that Aaeon system...

Thanks,
    Paul

[1] http://www.aaeon.com/en/p/com-express-modules-nanocom-tc

Re: [PATCH v7 09/11] net: pch_gbe: Convert to mdiobus and phylib

[Andrew Lunn]

> Would you prefer that the MAC driver instead selects the PHY drivers for
> all PHYs known to have been used with the MAC? Or would you be happy if
> I added the equivalent in patch 11:

Hi Paul

Generally, you don't list any specific PHY. All distribution kernels
simply enable all PHYs as kernel modules. Anybody building a cut down
kernel is supposed to know what modules they need for there hardware.

       Andrew

[PATCH v7 10/11] ptp: pch: Allow build on MIPS platforms

[Paul Burton]

Allow the ptp_pch driver to be built on MIPS platforms in preparation
for use on the MIPS Boston board.

Signed-off-by: Paul Burton <paul.burton@mips.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: David S. Miller <davem@davemloft.net>
Cc: netdev@vger.kernel.org
---

Changes in v7: None

 drivers/ptp/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/ptp/Kconfig b/drivers/ptp/Kconfig
index d137c480db46..fd5f2c6c18ba 100644
--- a/drivers/ptp/Kconfig
+++ b/drivers/ptp/Kconfig
@@ -90,7 +90,7 @@ config DP83640_PHY
 
 config PTP_1588_CLOCK_PCH
 	tristate "Intel PCH EG20T as PTP clock"
-	depends on X86_32 || COMPILE_TEST
+	depends on X86_32 || MIPS || COMPILE_TEST
 	depends on HAS_IOMEM && NET
 	imply PTP_1588_CLOCK
 	help
-- 
2.18.0

Re: [PATCH v7 10/11] ptp: pch: Allow build on MIPS platforms

[Andrew Lunn]

On Tue, Jun 26, 2018 at 05:06:11PM -0700, Paul Burton wrote:
> Allow the ptp_pch driver to be built on MIPS platforms in preparation
> for use on the MIPS Boston board.
> 
> Signed-off-by: Paul Burton <paul.burton@mips.com>
> Acked-by: Richard Cochran <richardcochran@gmail.com>
> Cc: Andrew Lunn <andrew@lunn.ch>
> Cc: David S. Miller <davem@davemloft.net>
> Cc: netdev@vger.kernel.org
> ---
> 
> Changes in v7: None
> 
>  drivers/ptp/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/ptp/Kconfig b/drivers/ptp/Kconfig
> index d137c480db46..fd5f2c6c18ba 100644
> --- a/drivers/ptp/Kconfig
> +++ b/drivers/ptp/Kconfig
> @@ -90,7 +90,7 @@ config DP83640_PHY
>  
>  config PTP_1588_CLOCK_PCH
>  	tristate "Intel PCH EG20T as PTP clock"
> -	depends on X86_32 || COMPILE_TEST
> +	depends on X86_32 || MIPS || COMPILE_TEST

Hi Paul

Is there anything in the code which stops it working on S390? ARM?
X86_64? Can we just remove this depends?

	Andrew

[PATCH v7 11/11] net: pch_gbe: Allow build on MIPS platforms

[Paul Burton]

Allow the pch_gbe driver to be built on MIPS platforms, allowing its use
on the MIPS Boston development board.

Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: David S. Miller <davem@davemloft.net>
Cc: netdev@vger.kernel.org

---

Changes in v7: None

 drivers/net/ethernet/oki-semi/pch_gbe/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/Kconfig b/drivers/net/ethernet/oki-semi/pch_gbe/Kconfig
index 5276f4ff3b63..8e3630b9a9d1 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/Kconfig
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/Kconfig
@@ -4,7 +4,7 @@
 
 config PCH_GBE
 	tristate "OKI SEMICONDUCTOR IOH(ML7223/ML7831) GbE"
-	depends on PCI && (X86_32 || COMPILE_TEST)
+	depends on PCI && (X86_32 || MIPS || COMPILE_TEST)
 	select PHYLIB
 	imply AT803X_PHY if X86_32
 	select PTP_1588_CLOCK_PCH
-- 
2.18.0

Re: [PATCH v7 11/11] net: pch_gbe: Allow build on MIPS platforms

[Andrew Lunn]

On Tue, Jun 26, 2018 at 05:06:12PM -0700, Paul Burton wrote:
> Allow the pch_gbe driver to be built on MIPS platforms, allowing its use
> on the MIPS Boston development board.
> 
> Signed-off-by: Paul Burton <paul.burton@mips.com>
> Cc: Andrew Lunn <andrew@lunn.ch>
> Cc: David S. Miller <davem@davemloft.net>
> Cc: netdev@vger.kernel.org
> 
> ---
> 
> Changes in v7: None
> 
>  drivers/net/ethernet/oki-semi/pch_gbe/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/Kconfig b/drivers/net/ethernet/oki-semi/pch_gbe/Kconfig
> index 5276f4ff3b63..8e3630b9a9d1 100644
> --- a/drivers/net/ethernet/oki-semi/pch_gbe/Kconfig
> +++ b/drivers/net/ethernet/oki-semi/pch_gbe/Kconfig
> @@ -4,7 +4,7 @@
>  
>  config PCH_GBE
>  	tristate "OKI SEMICONDUCTOR IOH(ML7223/ML7831) GbE"
> -	depends on PCI && (X86_32 || COMPILE_TEST)
> +	depends on PCI && (X86_32 || MIPS || COMPILE_TEST)

Same question here as for the PTP driver.

     Andrew