From mboxrd@z Thu Jan 1 00:00:00 1970 From: David Miller Subject: Re: [PATCH 3/3 v2] net: dsa: Add Vitesse VSC73xx DSA router driver Date: Wed, 04 Jul 2018 11:32:40 +0900 (KST) Message-ID: <20180704.113240.652641829194832375.davem@davemloft.net> References: <20180630111731.19551-1-linus.walleij@linaro.org> <20180630111731.19551-3-linus.walleij@linaro.org> Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Cc: andrew@lunn.ch, vivien.didelot@savoirfairelinux.com, f.fainelli@gmail.com, netdev@vger.kernel.org, openwrt-devel@lists.openwrt.org, lede-dev@lists.infradead.org, juhosg@openwrt.org To: linus.walleij@linaro.org Return-path: Received: from shards.monkeyblade.net ([23.128.96.9]:55254 "EHLO shards.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932644AbeGDCco (ORCPT ); Tue, 3 Jul 2018 22:32:44 -0400 In-Reply-To: <20180630111731.19551-3-linus.walleij@linaro.org> Sender: netdev-owner@vger.kernel.org List-ID: From: Linus Walleij Date: Sat, 30 Jun 2018 13:17:31 +0200 > This adds a DSA driver for: > > Vitesse VSC7385 SparX-G5 5-port Integrated Gigabit Ethernet Switch > Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch > Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch > Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch > > These switches have a built-in 8051 CPU and can download and execute > firmware in this CPU. They can also be configured to use an external > CPU handling the switch in a memory-mapped manner by connecting to > that external CPU's memory bus. > > This driver (currently) only takes control of the switch chip over > SPI and configures it to route packages around when connected to a > CPU port. The chip has embedded PHYs and VLAN support so we model it > using DSA as a best fit so we can easily add VLAN support and maybe > later also exploit the internal frame header to get more direct > control over the switch. > > The four built-in GPIO lines are exposed using a standard GPIO chip. > > Signed-off-by: Linus Walleij > --- > ChangeLog v1->v2: > - Update .get_strings() and .get_sset_count() to match the signature > with the new argument for sset type. > - Drop DSA trailer select from Kconfig. > - Use MII_* namespace definitions instead of hard-coded hex > values and calls to read into the PHY: instead use the genphy > decoded link state already present in the phydev. > - Drop extraneous port number check in .enable() and .disable(), > this should not happen. > - Move the GPIO chip set-up into a separate function. > - Add some missing static in front of a counter function. > - Drop the bool flags in the state container, use some macros with > the chipid to identify model instead like IS_VSC739X(). > - Check phydev->interface() for configuring the CPU port into > RGMII mode. Applied.