From mboxrd@z Thu Jan 1 00:00:00 1970 From: Russell King - ARM Linux Subject: [PATCH 00/14] ARM BPF jit compiler improvements Date: Wed, 11 Jul 2018 10:30:33 +0100 Message-ID: <20180711093033.GP17271@n2100.armlinux.org.uk> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: Daniel Borkmann To: netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org Return-path: Received: from pandora.armlinux.org.uk ([78.32.30.218]:36744 "EHLO pandora.armlinux.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726368AbeGKJeJ (ORCPT ); Wed, 11 Jul 2018 05:34:09 -0400 Content-Disposition: inline Sender: netdev-owner@vger.kernel.org List-ID: Hi, This series improves the ARM BPF JIT compiler by: - enumerating the stack layout rather than using constants that happen to be multiples of four - rejig the BPF "register" accesses to use negative numbers instead of positive, which could be confused with register numbers in the bpf2a32 array. - since we maintain the ARM FP register as a pointer to the top of our scratch space (or, with frame pointers enabled, a valid ARM frame pointer register), we can access our scratch space using FP, which is constant across all BPF programs, including tail-called programs. - use immediate forms of ARM instructions where possible, rather than first loading the immediate into an ARM register. - use load-with-shift instruction rather than seperate shift instruction followed by load - avoid reloading index and array in the tail-call code - use double-word load/store instructions where available Version 2: - Fix ARMv5 test pointed out by Olof - Fix build error found by 0-day (adding an additional patch) arch/arm/net/bpf_jit_32.c | 982 ++++++++++++++++++++++++---------------------- arch/arm/net/bpf_jit_32.h | 42 +- 2 files changed, 543 insertions(+), 481 deletions(-) -- RMK's Patch system: http://www.armlinux.org.uk/developer/patches/ FTTC broadband for 0.8mile line in suburbia: sync at 13.8Mbps down 630kbps up According to speedtest.net: 13Mbps down 490kbps up