From: Brian Brooks <brian.brooks@linaro.org>
To: ast@kernel.org, daniel@iogearbox.net, bjorn.topel@intel.com,
magnus.karlsson@intel.com
Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
Brian Brooks <brian.brooks@linaro.org>
Subject: [PATCH v2 bpf-next] samples/bpf: xdpsock: order memory on AArch64
Date: Wed, 25 Jul 2018 16:08:19 -0500 [thread overview]
Message-ID: <20180725210819.1458-1-brian.brooks@linaro.org> (raw)
Define u_smp_rmb() and u_smp_wmb() to respective barrier instructions.
This ensures the processor will order accesses to queue indices against
accesses to queue ring entries.
Signed-off-by: Brian Brooks <brian.brooks@linaro.org>
---
samples/bpf/xdpsock_user.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/samples/bpf/xdpsock_user.c b/samples/bpf/xdpsock_user.c
index 5904b1543831..1e82f7c617c3 100644
--- a/samples/bpf/xdpsock_user.c
+++ b/samples/bpf/xdpsock_user.c
@@ -145,8 +145,13 @@ static void dump_stats(void);
} while (0)
#define barrier() __asm__ __volatile__("": : :"memory")
+#ifdef __aarch64__
+#define u_smp_rmb() __asm__ __volatile__("dmb ishld": : :"memory")
+#define u_smp_wmb() __asm__ __volatile__("dmb ishst": : :"memory")
+#else
#define u_smp_rmb() barrier()
#define u_smp_wmb() barrier()
+#endif
#define likely(x) __builtin_expect(!!(x), 1)
#define unlikely(x) __builtin_expect(!!(x), 0)
--
2.18.0
next reply other threads:[~2018-07-25 22:22 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-25 21:08 Brian Brooks [this message]
2018-07-26 12:18 ` [PATCH v2 bpf-next] samples/bpf: xdpsock: order memory on AArch64 Björn Töpel
2018-07-27 1:48 ` Daniel Borkmann
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